PRTR5V0U8S Datasheet, PDF (2/7 Pages) NXP Semiconductors – Integrated octal low-capacity ESD protection to IEC 61000-4-2 level 4

NXP Semiconductors
PRTR5V0U8S
Integrated octal low-capacity ESD protection
2. Pinning information
Table 1. Pinning
Pin Description
1
ESD protection I/O 1
2
ESD protection I/O 2
3
ground (GND)
4
ESD protection I/O 3
5
ESD protection I/O 4
6
ESD protection I/O 5
7
ESD protection I/O 6
8
supply voltage (V_CC)
9
ESD protection I/O 7
10 ESD protection I/O 8
Simplified outline
Symbol
10
6
1
2
3
1
5
4
5
10
9
8
7
6
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3. Ordering information
Table 2. Ordering information
Type number Package
Name
Description
PRTR5V0U8S TSSOP10 plastic thin shrink small outline package; 10 leads;
body width 3 mm
Version
SOT552-1
4. Limiting values
Table 3. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
V_(I/O-GND) input/output to ground voltage
0
T_stg
storage temperature
−55
Table 4. ESD standards compliance
Standard
Per diode
IEC 61000-4-2; level 4 (ESD)
Conditions
≤ 8 kV (contact)
Max Unit
5.5
V
+125 °C
PRTR5V0U8S_1
Preliminary data sheet
Rev. 01 — 14 January 2008
© NXP B.V. 2008. All rights reserved.
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