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GTL2009 Datasheet, PDF (2/17 Pages) NXP Semiconductors – 3-bit GTL Front-Side Bus frequency comparator
Philips Semiconductors
GTL2009
3-bit GTL Front-Side Bus frequency comparator
3. Quick reference data
Table 1: Quick reference data
Tamb = 25 °C
Symbol Parameter
Conditions
tPLH
LOW-to-HIGH propagation delay; CL = 30 pF;
BI to BO
VDD = 3.3 V
tPHL
HIGH-to-LOW propagation delay;
BI to BO
Min Typ Max Unit
3.0 16.5 30 ns
2.3 16.2 30 ns
4. Ordering information
Table 2: Ordering information
Type number Topside
mark
Package
Name
Description
GTL2009PW GTL2009 TSSOP16 plastic thin shrink small outline package;
16 leads; body width 4.4 mm
Version
SOT403-1
5. Functional diagram
9397 750 13556
Product data sheet
VREF
GTL2009
START-UP
A≥B
1=B
A
MUX
B
common
FSB
BSEL1
BSEL2
BSEL3
default output is
101 = 100 MHz
VDD
BO1
BO2
BO3
1BI1
1BI2
1BI3
1AI
2AI
2BI1
2BI2
2BI3
A - BSEL1
A - BSEL2
A - BSEL3
A - Occupied#
B - Occupied#
B - BSEL1
B - BSEL2
B - BSEL3
GTL to TTL
active LOW
active LOW
GTL to TTL
A
COMPARE
B
A≥B
equal
AO2
AO1
VSS
If B - Occupied only, then A ≥ B = 1.
If A - Occupied only, then A ≥ B = 0.
If A and B - Occupied, then A ≥ B = 1 if A frequency higher than B frequency.
Pin assignment: A = LVTTL, B = GTL, I = Input, O = Output.
Refer to Section 7.2 “Default conditions input”.
Fig 1. Functional diagram of GTL2009
002aaa997
Rev. 01 — 22 September 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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