GTL2008 Datasheet, PDF (2/22 Pages) NXP Semiconductors – 12-bit GTL to LVTTL translator with power good control and high-impedance LVTTL and GTL outputs

NXP Semiconductors
GTL2008
GTL translator with power good control and high-impedance outputs
„ Latch-up testing is done to JEDEC Standard JESD78 Class II, Level A which exceeds
500 mA
„ Package offered: TSSOP28
3. Quick reference data
Table 1. Quick reference data
T_amb = 25 °C
Symbol Parameter
C_io
input/output capacitance
V_ref = 0.73 V; V_TT = 1.1 V
t_PLH
LOW to HIGH
propagation delay
t_PHL
HIGH to LOW
propagation delay
V_ref = 0.76 V; V_TT = 1.2 V
t_PLH
LOW to HIGH
propagation delay
t_PHL
HIGH to LOW
propagation delay
Conditions
A port; V_O = 3.0 V or 0 V
B port; V_O = V_TT or 0 V
nA to nBI; see Figure 4
nBI to nA or nAO (open-drain outputs);
see Figure 14
nA to nBI; see Figure 4
nBI to nA or nAO (open-drain outputs);
see Figure 14
nA to nBI; see Figure 4
nBI to nA or nAO (open-drain outputs);
see Figure 14
nA to nBI; see Figure 4
nBI to nA or nAO (open-drain outputs);
see Figure 14
4. Ordering information
Min Typ
-
2.5
-
1.5
Max Unit
3.5 pF
2.5 pF
1
4
8
ns
2
13
18
ns
2
5.5
10
ns
2
4
10
ns
1
4
8
ns
2
13
18
ns
2
5.5
10
ns
2
4
10
ns
Table 2. Ordering information
T_amb = −40 °C to +85 °C
Type
number
Topside Package
mark
Name
GTL2008PW GTL2008 TSSOP28
Description
plastic thin shrink small outline package; 28 leads; body width 4.4 mm
Version
SOT361-1
GTL2008_4
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 04 — 19 February 2010
© NXP B.V. 2010. All rights reserved.
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