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ADC1412D Datasheet, PDF (19/40 Pages) NXP Semiconductors – Dual 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs
NXP Semiconductors
ADC1412D series
CMOS or LVDS DDR digital outputs
VREF
REFERENCE
AMP
BUFFER
EXT_ref
EXT_ref
BANDGAP
REFERENCE
REFAT/
REFBT
REFAB/
REFBB
SENSE
SELECTION
LOGIC
ADC CORE
Fig 12. Reference equivalent schematic
005aaa164
If bit INTREF_EN is set to 0, the reference voltage is determined either internally or
externally as detailed in Table 12.
Table 12. Reference selection
Selection
SPI bit
INTREF_EN
internal
0
(Figure 13)
internal
0
(Figure 14)
external
0
(Figure 15)
internal via SPI 1
(Figure 16)
SENSE pin VREF pin
Full-scale (p-p)
AGND
330 pF capacitor to
AGND
pin VREF connected to pin SENSE and
via a 330 pF capacitor to AGND
VDDA
external voltage between
0.5 V and 1 V[1]
pin VREF connected to pin SENSE and
via 330 pF capacitor to AGND
2V
1V
1 V to 2 V
1 V to 2 V
[1] The voltage on pin VREF is doubled internally to generate the internal reference voltage.
ADC1412D_SER
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 03 — 6 August 2010
© NXP B.V. 2010. All rights reserved.
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