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| TDA8922C Datasheet, PDF (15/40 Pages) NXP Semiconductors – 2 X 75 W class-D power amplifier | |||
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NXP Semiconductors
TDA8922C
2 à 75 W class-D power ampliï¬er
Table 9. Dynamic characteristics â¦continued
VDD = 30 V; VSS = â30 V; Tamb = 25 °C; unless otherwise speciï¬ed.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Zi
input impedance
1
-
-
Mâ¦
Ci
input capacitance
-
-
15
pF
tr(i)
input rise time
from SGCN to SGND + 5 V
[2] -
-
100
ns
[1] When using an external oscillator, the frequency ftrack (500 kHz minimum, 900 kHz maximum) will result in a PWM frequency fosc (250
kHz minimum, 450 kHz maximum) due to the internal clock divider; see Section 8.2.
[2] When tr(i) > 100 ns, the output noise ï¬oor will increase.
12.2 Stereo SE conï¬guration characteristics
Table 10. Dynamic characteristics
VDD = 30 V; VSS = â30 V; RL = 6 â¦; fi = 1 kHz; fosc = 350 kHz; Rs(L) < 0.1 â¦[1]; Tamb = 25 °C; unless otherwise speciï¬ed.
Symbol Parameter
Conditions
Min Typ Max Unit
Po
output power
L = 22 µH; CLC = 680 nF; Tj = 85 °C [2]
THD = 0.5 %; RL = 6 â¦
- 58 - W
THD
total harmonic distortion
THD = 10 %; RL = 6 â¦
Po = 1 W; fi = 1 kHz
Po = 1 W; fi = 6 kHz
- 75 - W
[3] -
0.02 -
%
[3] -
0.05 -
%
Gv(cl)
closed-loop voltage gain
29 30 31 dB
SVRR supply voltage rejection ratio
between pins VDDPn and SGND
Operating mode; fi = 100 Hz
Operating mode; fi = 1 kHz
Mute mode; fi = 100 Hz
Standby mode; fi = 100 Hz
[4] -
72 -
dB
[4] -
55 -
dB
[4] -
80 -
dB
[4] -
116 -
dB
between pins VSSPn and SGND
Operating mode; fi = 100 Hz
Operating mode; fi = 1 kHz
Mute mode; fi = 100 Hz
Standby mode; fi = 100 Hz
[4] -
72 -
dB
[4] -
60 -
dB
[4] -
72 -
dB
[4] -
116 -
dB
Zi
input impedance
between one of the input pins and
SGND
45 63 - kâ¦
Vn(o)
output noise voltage
Operating mode; Rs = 0 â¦; inputs
shorted
[5] -
160 -
µV
Mute mode
[6] -
85 -
µV
αcs
channel separation
[7] -
70 -
dB
|âGv|
αmute
voltage gain difference
mute attenuation
fi = 1 kHz; Vi = 2 V (RMS)
- - 1 dB
[8] -
75 -
dB
CMRR common mode rejection ratio
Vi(CM) = 1 V (RMS)
- 75 - dB
ηpo
output power efï¬ciency
SE, RL = 6 â¦
- 88 - %
SE, RL = 8 â¦
- 90 - %
RDSon(hs)
RDSon(ls)
BTL, RL = 16 â¦
high-side drain-source on-state resistance
low-side drain-source on-state resistance
- 90 - %
[9] -
380 -
mâ¦
[9] -
320 -
mâ¦
TDA8922C_1
Product data sheet
Rev. 01 â 7 September 2009
© NXP B.V. 2009. All rights reserved.
15 of 40
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