SC16C852V_08 Datasheet, PDF (15/54 Pages) NXP Semiconductors – 1.8 V dual UART, 5 Mbit/s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface

NXP Semiconductors
SC16C852V
Dual UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
XTAL1
XTAL2
X1
1.8432 MHz
C1
22 pF
C2
33 pF
Fig 7. Crystal oscillator connection
XTAL1
XTAL2
1.5 kΩ
X1
1.8432 MHz
C1
22 pF
C2
47 pF
002aaa870
f_XTAL1
XTAL1
100 pF
XTAL2
002aac630
Fig 8.
If f_XTAL1 frequency is greater than 50 MHz, then a DC blocking capacitor is required.
XTAL2 pin should be left unconnected when an external clock is used.
External clock connection
Table 6. Baud rate generator programming table using a 1.8432 MHz clock with MCR[7] = 0
and CLKPRE[3:0] = 0
Output
baud rate
(bit/s)
Output
16× clock divisor
(decimal)
Output
16× clock divisor
(hexadecimal)
DLM
program value
(hexadecimal)
DLL
program value
(hexadecimal)
50
2304
900
09
00
75
1536
600
06
00
110
1047
417
04
17
150
768
300
03
00
300
384
180
01
80
600
192
C0
00
C0
1200
96
60
00
60
2400
48
30
00
30
3600
32
20
00
20
4800
24
18
00
18
7200
16
10
00
10
9600
12
0C
00
0C
19.2 k
6
06
00
06
38.4 k
3
03
00
03
57.6 k
2
02
00
02
115.2 k
1
01
00
01
SC16C852V_4
Product data sheet
Rev. 04 — 14 January 2008
© NXP B.V. 2008. All rights reserved.
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