SC16C852V_08 Datasheet, PDF (10/54 Pages) NXP Semiconductors – 1.8 V dual UART, 5 Mbit/s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface

NXP Semiconductors
SC16C852V
Dual UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
6.2 Extended mode (128-byte FIFO)
The device is in the extended mode when any of these four registers contains any value
other than 0: FLWCNTH, FLWCNTL, TXINTLVL, RXINTLVL.
6.3 Internal registers
The SC16C852V provides two sets of internal registers (A and B) consisting of
25 registers each for monitoring and controlling the functions of each channel of the
UART. These registers are shown in Table 4.
Table 4. Internal registers decoding
A3 A2 A1 Read mode
Write mode
General register set (THR/RHR, IER/ISR, MCR/MSR, FCR, LCR, LSR, EFCR, SPR)^[1]
0 0 0 Receive Holding Register
Transmit Holding Register
0 0 1 Interrupt Enable Register
Interrupt Enable Register
0 1 0 Interrupt Status Register
FIFO Control Register
0 1 1 Line Control Register
Line Control Register
1 0 0 Modem Control Register
Modem Control Register
1 0 1 Line Status Register
Extra Feature Control Register (EFCR)
1 1 0 Modem Status Register
n/a
1 1 1 Scratchpad Register
Scratchpad Register
Baud rate register set (DLL/DLM)^[2]
0 0 0 LSB of Divisor Latch
LSB of Divisor Latch
0 0 1 MSB of Divisor Latch
MSB of Divisor Latch
Second special register set (TXLVLCNT/RXLVLCNT)^[3]
0 1 1 Transmit FIFO Level Count
n/a
1 0 0 Receive FIFO Level Count
n/a
Enhanced register set (EFR, Xon1/Xon2, Xoff1/Xoff2)^[4]
0 1 0 Enhanced Feature Register
Enhanced Feature Register
1 0 0 Xon1 word
Xon1 word
1 0 1 Xon2 word
Xon2 word
1 1 0 Xoff1 word
Xoff1 word
1 1 1 Xoff2 word
Xoff2 word
First extra feature register set (TXINTLVL/RXINTLVL, FLWCNTH/FLWCNTL)^[5]
0 1 0 Transmit FIFO Interrupt Level
Transmit FIFO Interrupt Level
1 0 0 Receive FIFO Interrupt Level
Receive FIFO Interrupt Level
1 1 0 Flow Control Count High
Flow Control Count High
1 1 1 Flow Control Count Low
Flow Control Count Low
Second extra feature register set (CLKPRES, RS485TIME, AFCR2, AFCR1)^[6]
0 1 0 Clock Prescaler
Clock Prescaler
1 0 0 RS-485 turn-around Timer
RS-485 turn-around Timer
1 1 0 Additional Feature Control Register 2 Additional Feature Control Register 2
1 1 1 Additional Feature Control Register 1 Additional Feature Control Register 1
[1] These registers are accessible only when LCR[7] is a logic 0.
SC16C852V_4
Product data sheet
Rev. 04 — 14 January 2008
© NXP B.V. 2008. All rights reserved.
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