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74HC373BQ Datasheet, PDF (15/26 Pages) NXP Semiconductors – Octal D-type transparent latch; 3-state
NXP Semiconductors
74HC373; 74HCT373
Octal D-type transparent latch; 3-state
Table 9. Dynamic characteristics 74HCT373 …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 12.
Symbol Parameter
Conditions
Min Typ Max Unit
th
hold time Dn to LE
Dn to LE; see Figure 11
VCC = 4.5 V
4
-
-
ns
[1] tpd is the same as tPLH and tPHL.
[2] ten is the same as tPZH and tPZL.
[3] tdis is the same as tPLZ and tPHZ.
[4] tt is the same as tTHL and tTLH.
[5] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL  VCC2  fo) = sum of outputs.
11. Waveforms
Dn input
VM
Qn output
t PLH
VM
10 %
t TLH
90 %
t PHL
t THL
001aae082
Measurement points are given in Table 10.
Fig 8. Propagation delay input (Dn) to output (Qn) and transition time output (Qn)
LE input
VM
Qn output
tW
t PHL
90 %
t THL
VM
10 %
t PLH
t TLH
001aae083
Measurement points are given in Table 10.
Fig 9. Pulse width latch enable input (LE), propagation delay (LE) to output (Qn) and transition time output (Qn)
74HC_HCT373
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 13 December 2011
© NXP B.V. 2011. All rights reserved.
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