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74HC373BQ Datasheet, PDF (10/26 Pages) NXP Semiconductors – Octal D-type transparent latch; 3-state
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NXP Semiconductors
74HC373; 74HCT373
Octal D-type transparent latch; 3-state
10. Dynamic characteristics
Table 8. Dynamic characteristics 74HC373
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 12.
Symbol Parameter
Conditions
Min Typ Max Unit
Tamb = 25 C
tpd
propagation delay
Dn to Qn; see Figure 8
[1]
VCC = 2.0 V
-
41
150 ns
VCC = 4.5 V
-
15
30
ns
VCC = 5 V; CL = 15 pF
-
12
-
ns
VCC = 6.0 V
-
12
26
ns
LE to Qn; see Figure 9
VCC = 2.0 V
-
50
175 ns
VCC = 4.5 V
-
18
35
ns
VCC = 5 V; CL = 15 pF
-
15
-
ns
ten
enable time
VCC = 6.0 V
OE to Qn; see Figure 10
-
[2]
14
30
ns
VCC = 2.0 V
-
44
150 ns
VCC = 4.5 V
-
16
30
ns
tdis
disable time
VCC = 6.0 V
OE to Qn; see Figure 10
-
[3]
13
26
ns
VCC = 2.0 V
-
47
150 ns
VCC = 4.5 V
-
17
30
ns
tt
transition time
VCC = 6.0 V
Qn; see Figure 8 and Figure 9
-
[4]
14
26
ns
VCC = 2.0 V
-
14
60
ns
VCC = 4.5 V
-
5
12
ns
VCC = 6.0 V
-
4
10
ns
tW
pulse width
LE HIGH; see Figure 9
VCC = 2.0 V
80
17
-
ns
VCC = 4.5 V
16
6
-
ns
tsu
set-up time
VCC = 6.0 V
Dn to LE; see Figure 11
14
5
-
ns
VCC = 2.0 V
50
14
-
ns
VCC = 4.5 V
10
5
-
ns
VCC = 6.0 V
9
4
-
ns
th
hold time
Dn to LE; see Figure 11
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
CPD
power dissipation capacitance
per latch; VI = GND to VCC
+5
8
-
ns
+5
3
-
ns
+5
2
-
ns
[5] -
45
-
pF
74HC_HCT373
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 13 December 2011
© NXP B.V. 2011. All rights reserved.
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