74HC4094D Datasheet, PDF(12/23 Page) NXP Semiconductors – 8-stage shift-and-store bus register

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74HC4094D Datasheet, PDF (12/23 Pages) NXP Semiconductors – 8-stage shift-and-store bus register

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NXP Semiconductors

74HC4094; 74HCT4094

8-stage shift-and-store bus register

[2] ten is the same as tPZH and tPZL.

[3] tdis is the same as tPLZ and tPHZ.

[4] tt is the same as tTHL and tTLH.

[5] CPD is used to determine the dynamic power dissipation (PD in ïW).

PD = CPD ï´ VCC2 ï´ fi ï´ N + ï¥(CL ï´ VCC2 ï´ fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

ï¥(CL ï´ VCC2 ï´ fo) = sum of outputs.

12. Waveforms

CP input

GND

VOH

QPn, QS1 output

VOL

VOH

QS2 output

VOL

1/fmax

tPLH

tTLH

tPLH

tPHL

90 %

10 %

tTHL

tPHL

aaa-003132

Fig 8.

Measurement points are given in Table 8.

VOL and VOH are typical voltage output levels that occur with the output load.

Propagation delay input (CP) to output (QPn, QS1, QS2), output transition time, clock input (CP) pulse

width and the maximum frequency (CP)

74HC_HCT4094

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 6 â 31 December 2012

12 of 23

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