English
Language : 

74HC4094D Datasheet, PDF (11/23 Pages) NXP Semiconductors – 8-stage shift-and-store bus register
◁
NXP Semiconductors
74HC4094; 74HCT4094
8-stage shift-and-store bus register
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 12.
Symbol Parameter Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max
Min
Max
74HCT4094
tpd
propagation CP to QS1; see Figure 8 [1]
delay
VCC = 4.5 V
-
23 39
-
49
-
59 ns
VCC = 5 V; CL = 15 pF
-
19 -
-
-
-
-
ns
CP to QS2; see Figure 8 [1]
VCC = 4.5 V
-
21 36
-
45
-
54 ns
VCC = 5 V; CL = 15 pF
-
18 -
-
-
-
-
ns
CP to QPn; see Figure 8 [1]
VCC = 4.5 V
-
25 43
-
54
-
65 ns
VCC = 5 V; CL = 15 pF
-
21 -
-
-
-
-
ns
STR to QPn; see Figure 9 [1]
VCC = 4.5 V
-
22 39
-
49
-
59 ns
VCC = 5 V; CL = 15 pF
-
19 -
-
-
-
-
ns
ten
enable time OE to QPn; see Figure 11 [2]
VCC = 4.5 V
-
20 35
-
44
-
53 ns
tdis
disable time OE to QPn; see Figure 11 [3]
VCC = 4.5 V
-
21 35
-
44
-
53 ns
tt
transition QPn and QSn; see
[4]
time
Figure 8
VCC = 4.5 V
tW
pulse width CP HIGH or LOW;
see Figure 8
-
7 15
-
19
-
22 ns
VCC = 4.5 V
STR HIGH; see Figure 9
16 7
-
20
-
24
-
ns
VCC = 4.5 V
tsu
set-up time Dn to CP; see Figure 10
VCC = 4.5 V
CP to STR; see Figure 9
16 5
-
20
-
24
10 4
-
13
-
15
-
ns
-
ns
VCC = 4.5 V
th
hold time Dn to CP; see Figure 10
VCC = 4.5 V
CP to STR; see Figure 9
20 9
-
25
-
30
4
0
-
4
-
4
-
ns
-
ns
VCC = 4.5 V
0 4 -
0
-
0
-
ns
fmax
maximum CP; see Figure 8
frequency
VCC = 4.5 V
30 80
-
24
-
20
-
MHz
VCC = 5 V; CL = 15 pF
-
86 -
-
-
-
-
MHz
CPD
power
CL = 50 pF; f = 1 MHz;
[5] -
92 -
-
-
-
-
pF
dissipation VI = GND to VCC
capacitance
[1] tpd is the same as tPLH and tPHL.
74HC_HCT4094
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 31 December 2012
© NXP B.V. 2012. All rights reserved.
11 of 23
 ▷