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TDA8783HLBE-T Datasheet, PDF (11/28 Pages) NXP Semiconductors – 40 Msps, 10-bit analog-to-digital interface for CCD cameras
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Philips Semiconductors
40 Msps, 10-bit analog-to-digital
interface for CCD cameras
Product specification
TDA8783
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
ZOFDOUT
additional 8-bit control DAC
(OFD) output impedance
IOFDOUT
OFD output current drive
ADC clamp control DAC (see Fig.8)
VDACOUT(p-p) ADC clamp 10-bit control DAC
output voltage (peak-to-peak
value)
VDACOUT
DC output voltage
ZDACOUT
IDACOUT
OFELOOP
ADC clamp control DAC output
impedance
DAC output current drive
maximum offset error of
DAC + ADC clamp loop
static
code 0
code 1023
static
code 0
code 1023
−
2000 −
Ω
−
−
50
µA
−
1
−
V
−
1.5 −
V
−
2.5 −
V
−
−
250 Ω
−
−
50
µA
−
±5
−
LSB
−
±5
−
LSB
Digital outputs (fCLK = 40 MHz; CL = 20 pF); note 3
VOH
HIGH-level output voltage
IOH = −1 mA
VOL
LOW-level output voltage
IOL = 1 mA
IOZ
output current in 3-state mode
0 V < Vo < VCCO
to(h)
output hold time
to(d)
output delay time
CL = 20 pF; VCCO = 5 V
CL = 10 pF; VCCO = 5 V
CL = 20 pF; VCCO = 3 V
CL = 10 pF; VCCO = 3 V
CL = 20 pF; VCCO = 2.5 V
CL = 10 pF; VCCO = 2.5 V
Serial interface
VCCO − 0.5 −
0
−
−20
−
8
−
−
17
−
15
−
20
−
17
−
22
−
18
VCCO V
0.5 V
+20 µA
−
ns
23
ns
21
ns
29
ns
25
ns
33
ns
28
ns
fSCLK(max)
maximum frequency of serial
interface
5
−
−
MHz
Notes
1. More information about CDS related signals is available in the following figures: The clamp current for pin CPCDS is
given in Fig. 9, clamp current for pins IND and INP in Fig 10 and for clamp current for pin Vref in Fig 11. The CDS
output amplitude is shown in Fig. 14
2. Noise measurement at ADC outputs: the coupling capacitor at the input is connected to ground, so that only the noise
contribution of the front-end is evaluated. The front-end operates at 18 Mpix with a line of 1024 pixels. The first 40 are
used to run CLPOB and the last 40 to run CLPDM. Data at the ADC outputs is measured during the other pixels.
The differences between the types of codes statistic is then computed; the result is the noise. No quantization noise
is taken into account as no signal is input. Figure15 gives noise figure graphs with signal input.
3. Depending on operating pixel frequency, the output voltage and capacitance must be determined according to the
output delay timings (to(d)), see Fig.5.
2002 Oct 23
11
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