BUK114-50L Datasheet, PDF (11/13 Pages) NXP Semiconductors – Logic level TOPFET

Philips Semiconductors
Logic level TOPFET
SMD version of BUK104-50L/S
VIS / V & VDS / V
15
VIS
10
BUK114-50L/S
VDS
5
0
0
0.5
1
time / us
Fig.28. Typical resistive load switching waveforms
R_I = R_IS = 50 Ω; R_L = 10 Ω; V_DD = 15 V; T_j = 25 ˚C
VII
RI
RIS
D
TOPFET
P
VIS
F
P
I
S
Fig.29. External input resistances R_I and R_IS,
generator voltage V_II and input voltage V_IS.
Capacitance / pF
10000
BUK114-50L/S
1000
100
Ciss
Coss
Crss
10
0
10
20
30
40
50
VDS / V
Fig.30. Typical capacitances, C_iss, C_oss, C_rss.
C = f(V_DS); conditions: V_IS = 0 V; f = 1 MHz
Product specification
BUK114-50L/S
Idsr
1 mA
100 uA
10 uA
typ.
1 uA
100 nA
0
20
40
60
80 100 120 140
Tj / C
Fig.31. Typical off-state leakage current.
I_DSR = f(T_j); Conditions: V_DS = 40 V; R_IS = 100 Ω.
Ips normalised to 25 C
1.5
1
0.5
-60
-20
20
60
100
140
180
Tj / C
Fig.32. Normalised protection supply current.
I_PS/I_PS25 ˚C = f(T_j); V_PS = V_PSN
September 1996
11
Rev 1.000