ADC1413S Datasheet, PDF (11/38 Pages) NXP Semiconductors – Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; serial JESD204A interface

NXP Semiconductors
ADC1413S series
Single 14-bit ADC: serial JESD204A interface
10.4 SPI timing
Table 8.
Symbol
t_w(SCLK)
t_w(SCLKH)
t_w(SCLKL)
t_su
t_h
f_clk(max)
SPI timing characteristics ^[1]
Parameter
Conditions
SCLK pulse width
SCLK HIGH pulse
width
SCLK LOW pulse
width
set-up time
data to
SCLK HIGH
CS to
SCLK HIGH
hold time
data to
SCLK HIGH
CS to
SCLK HIGH
maximum clock
frequency
Min
Typ Max
Unit
-
40
-
ns
-
16
-
ns
-
16
-
ns
-
5
-
ns
-
5
-
ns
-
2
-
ns
-
2
-
ns
-
25
-
MHz
[1] Typical values measured at V_DDA = 3 V, V_DDD(1V8) = 1.8 V, T_amb = 25 C. Minimum and maximum values
are across the full temperature range T_amb = 40 C to +85 C at V_DDA = 3 V, V_DDD(1V8) = 1.8 V;
V_i(INP)  V_i(INM) = 1 dBFS; internal reference mode; 100  differential applied to serial outputs; unless
otherwise specified.
t_su
CS
t_su
t_h
t_w(SCLK)
t_w(SCLKL)
t_w(SCLKH)
t_h
SCLK
SDIO
R/W W1 W0 A12
A11
Fig 5. SPI timing
D2
D1
D0
005aaa065
ADC1413S_SER
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 8 June 2011
© NXP B.V. 2011. All rights reserved.
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