74HC75N Datasheet, PDF (11/20 Pages) NXP Semiconductors – Quad bistable transparant latch

Philips Semiconductors
74HC75
Quad bistable transparant latch
Table 8: Dynamic characteristics …continued
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF; unless otherwise specified, see Figure 10.
Symbol Parameter
Conditions
Min
T_amb = −40 °C to +125 °C
t_PHL, t_PLH propagation delay
see Figure 6
nD to nQ
V_CC = 2.0 V
-
V_CC = 4.5 V
-
V_CC = 6.0 V
-
propagation delay
see Figure 7
nD to nQ
V_CC = 2.0 V
-
V_CC = 4.5 V
-
V_CC = 6.0 V
-
propagation delay
see Figure 9
LEnn to nQ
V_CC = 2.0 V
-
V_CC = 4.5 V
-
V_CC = 6.0 V
-
propagation delay
see Figure 9
LEnn to nQ
V_CC = 2.0 V
-
V_CC = 4.5 V
-
V_CC = 6.0 V
-
t_THL, t_TLH output transition time see Figure 6 and 7
V_CC = 2.0 V
-
V_CC = 4.5 V
-
V_CC = 6.0 V
-
t_W
enable pulse width see Figure 9
HIGH
V_CC = 2.0 V
120
V_CC = 4.5 V
24
V_CC = 6.0 V
20
t_su
set-up time nD to
see Figure 8
LEnn
V_CC = 2.0 V
90
V_CC = 4.5 V
18
V_CC = 6.0 V
15
t_h
hold time nD to LEnn see Figure 8
V_CC = 2.0 V
3
V_CC = 4.5 V
3
V_CC = 6.0 V
3
[1] C_PD is used to determine the dynamic power dissipation (P_D in µW).
P_D = C_PD × V_CC2 × f_i × N + ∑(C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz;
f_o = output frequency in MHz;
C_L = output load capacitance in pF;
V_CC = supply voltage in V;
N = number of inputs switching;
∑(C_L × V_CC2 × f_o) = sum of outputs.
9397 750 13816
Product data sheet
Rev. 03 — 12 November 2004
Typ
Max
Unit
-
165
ns
-
33
ns
-
28
ns
-
180
ns
-
36
ns
-
31
ns
-
180
ns
-
36
ns
-
31
ns
-
190
ns
-
38
ns
-
32
ns
-
110
ns
-
22
ns
-
19
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
-
ns
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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