PSMN9R0-30YL_10 Datasheet, PDF (1/14 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET

PSMN9R0-30YL
N-channel TrenchMOS logic level FET
Rev. 03 — 5 January 2010
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
industrial and communications applications.
1.2 Features and benefits
„ High efficiency due to low switching
and conduction losses
„ Suitable for logic level gate drive
sources
1.3 Applications
„ Class-D amplifiers
„ DC-to-DC converters
„ Motor control
„ Server power supplies
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
Conditions
Min
V_DS
drain-source voltage T_j ≥ 25 °C; T_j ≤ 175 °C
-
I_D
drain current
T_mb = 25 °C; V_GS = 10 V;
-
see Figure 1 and 3
P_tot
total power
dissipation
T_mb = 25 °C; see Figure 2
-
Dynamic characteristics
Q_GD
gate-drain charge
Q_G(tot) total gate charge
Static characteristics
V_GS = 4.5 V; I_D = 10 A;
-
V_DS = 12 V; see Figure 14 and 15
V_GS = 4.5 V; I_D = 10 A;
-
V_DS = 12 V; see Figure 14
R_DSon drain-source
V_GS = 10 V; I_D = 15 A; T_j = 25 °C -
on-state resistance
Typ Max Unit
-
30 V
-
61 A
-
46 W
2.4 -
nC
8.7 -
nC
6.16 8
mΩ