M29W064FT Datasheet, PDF (7/69 Pages) Numonyx B.V – 64 Mbit (8 Mbit x 8 or 4 Mbit x 16, page, boot block) 3 V supply Flash memory

M29W064FT, M29W064FB
1
Description
Description
The M29W064F is a 64 Mbit (8 Mbit x 8 or 4 Mbit x 16) non-volatile memory that can be
read, erased and reprogrammed. These operations can be performed using a single low
voltage (2.7 to 3.6 V) supply. On power-up the memory defaults to its read mode.
The memory is divided into blocks that can be erased independently so it is possible to
preserve valid data while old data is erased. Blocks can be protected in units of 256 Kbytes
(generally groups of four 64 Kbyte blocks), to prevent accidental program or erase
commands from modifying the memory. Program and erase commands are written to the
command interface of the memory. An on-chip program/erase controller simplifies the
process of programming or erasing the memory by taking care of all of the special
operations that are required to update the memory contents. The end of a program or erase
operation can be detected and any error conditions identified. The command set required to
control the memory is consistent with JEDEC standards.
The device features an asymmetrical blocked architecture. The device has an array of 135
blocks:
● 8 parameters blocks of 8 Kbytes each (or 4 Kwords each)
● 127 main blocks of 64 Kbytes each (or 32 Kwords each)
M29W064FT has the parameter blocks at the top of the memory address space while the
M29W064FB locates the parameter blocks starting from the bottom.
The M29W064F has an extra block, the extended block, of 128 words in x 16 mode or of
256 bytes in x 8 mode that can be accessed using a dedicated command. The extended
block can be protected and so is useful for storing security information. However the
protection is not reversible, once protected the protection cannot be undone.
Chip Enable, Output Enable and Write Enable signals control the bus operation of the
memory. They allow simple connection to most microprocessors, often without additional
logic.
The V_PP/WP signal is used to enable faster programming of the device, enabling multiple
word/byte programming. If this signal is held at V_SS, the boot block, and its adjacent
parameter block, are protected from program and erase operations.
The device supports asynchronous random read and page read from all blocks of the
memory array.
The memories are offered in TSOP48 (12 x 20 mm) package.
7/69