M29W128GH Datasheet, PDF (34/94 Pages) Numonyx B.V – 128 Mbit (16 Mb x 8 or 8 Mb x 16, page, uniform block) 3 V supply Flash memory

Command interface
M29W128GH, M29W128GL
6.2
6.2.1
Fast Program commands
The M29W128GH/L offers a set of Fast Program commands to improve the programming
throughput:
● Write to Buffer Program
● Enhanced Buffered Program (valid in x 16 mode only)
● Unlock Bypass.
See either Table 12, Table 13 or Table 14 depending on the configuration that is being used,
for a summary of the Fast Program commands.
When V_PPH is applied to the V_PP/Write Protect pin the memory automatically enters Unlock
Bypass mode (see Section 6.2.6: Unlock Bypass command).
After programming has started, Bus Read operations in the memory output the Status
Register content. Write to Buffer Program command can be suspended and then resumed
by issuing a Program Suspend command and a Program Resume command, respectively
(see Section 6.1.8: Program Suspend command and Section 6.1.9: Program Resume
command).
After the fast program operation has completed, the memory will return to the Read mode,
unless an error has occurred. When an error occurs Bus Read operations to the memory
will continue to output the Status Register. A Read/Reset command must be issued to reset
the error condition and return to Read mode. One of the Erase commands must be used to
set all the bits in a block or in the whole memory from ’0’ to ’1’.
Typical program times are given in Table 17: Program, Erase times and Program, Erase
endurance cycles.
Write to Buffer Program command
The Write to Buffer Program command makes use of the device’s 32-word/64-byte write
buffer to speed up programming. 32 words/64 bytes can be loaded into the write buffer.
Each write buffer has the same A22-A5 addresses.The Write to Buffer Program command
dramatically reduces system programming time compared to the standard non-buffered
Program command.
When issuing a Write to Buffer Program command, the V_PP/WP pin can be either held High,
V_IH, or raised to V_PPH.
See Table 17 for details on typical Write to Buffer Program times in both cases.
Five successive steps are required to issue the Write to Buffer Program command:
1. The Write to Buffer Program command starts with two unlock cycles
2. The third Bus Write cycle sets up the Write to Buffer Program command. The setup
code can be addressed to any location within the targeted block
3. The fourth Bus Write cycle sets up the number of words/bytes to be programmed.
Value N is written to the same block address, where N+1 is the number of words/bytes
to be programmed. N+1 must not exceed the size of the write buffer or the operation
will abort
4. The fifth cycle loads the first address and data to be programmed
5. Use N Bus Write cycles to load the address and data for each word/byte into the write
buffer. Addresses must lie within the range from the start address+1 to the start
address + N-1. Optimum performance is obtained when the start address corresponds
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