LP3936 Datasheet, PDF (9/20 Pages) National Semiconductor (TI) – Lighting Management System for Six White LEDs and One RGB or FLASH LED

MicroWire Timing Parameters (Continued)
Symbol
Parameter
10 Output Data Valid
11 Output Data Hold Time
12 CS Inactive Time
Note: Data guaranteed by design.
I²C Compatible Interface
Limit
Min
Max
55
15
10
Units
ns
ns
ns
I²C SIGNALS
In I²C mode the LP3936 pin SCL is used for the I²C clock and the pin CS is used for the I²C data signal SDA. Both these signals
need a pull-up resistor according to I²C specification. Unused pin DO can be left unconnected and pin DI must be connected to
V_{DD_IO} or GND.
I²C DATA VALIDITY
The data on SDA line must be stable during the HIGH period of the clock signal (SCL). In other words, state of the data line can
only be changed when CLK is LOW.
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I²C START AND STOP CONDITIONS
START and STOP bits classify the beginning and the end of the I²C session. START condition is defined as SDA signal
transitioning from HIGH to LOW while SCL line is HIGH. STOP condition is defined as the SDA transitioning from LOW to HIGH
while SCL is HIGH. The I²C master always generates START and STOP bits. The I²C bus is considered to be busy after START
condition and free after STOP condition. During data transmission, I²C master can generate repeated START conditions. First
START and repeated START conditions are equivalent, function-wise.
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TRANSFERRING DATA
Every byte put on the SDA line must be eight bits long, with the most significant bit (MSB) being transferred first. Each byte of data
has to be followed by an acknowledge bit. The acknowledge related clock pulse is generated by the master. The transmitter
releases the SDA line (HIGH) during the acknowledge clock pulse. The receiver must pull down the SDA line during the 9th clock
pulse, signifying an acknowledge. A receiver which has been addressed must generate an acknowledge after each byte has been
received.
After the START condition, the I²C master sends a chip address. This address is seven bits long followed by an eighth bit which
is a data direction bit (R/W). The LP3936 address is 36h. For the eighth bit, a “0” indicates a WRITE and a “1” indicates a READ.
The second byte selects the register to which the data will be written. The third byte contains data to write to the selected register.
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