LP3905 Datasheet, PDF (9/15 Pages) National Semiconductor (TI) – Power Management Unit For Low Power Handheld Applications

Functional Description (Continued)
rectifier at the SW pin to a low-pass filter formed by the
inductor and output filter capacitor. The output voltage is
equal to the average voltage at the SW pin.
PWM OPERATION
During PWM operation the converters operate as a voltage-
mode controllers with input voltage feed forward. This allows
the converters to achieve good load and line regulation. The
DC gain of the power stage is proportional to the input
voltage. To eliminate this dependence, feed forward in-
versely proportional to the input voltage is introduced.
While in PWM (Pulse Width Modulation) mode, the output
voltage is regulated by switching at a constant frequency
and then modulating the energy per cycle to control power to
the load. At the beginning of each clock cycle the PFET
switch is turned on and the inductor current ramps up until
the comparator trips and the control logic turns off the switch.
The current limit comparator can also turn off the switch in
case the current limit of the PFET is exceeded. Then the
NFET switch is turned on and the inductor current ramps
down. The next cycle is initiated by the clock turning off the
NFET and turning on the PFET.
PFM OPERATION
At very light loads, the converters enters PFM mode and
operate with reduced switching frequency and supply current
to maintain high efficiency.
The Bucks will automatically transition into PFM mode when
either of two conditions occurs for a duration of 32 or more
clock cycles:
A. The inductor current becomes discontinuous.
B. The peak PMOS switch current drops below the I_MODE
level,
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FIGURE 8. Typical PWM Operation
Internal Synchronous Rectification
While in PWM mode, if enabled, the Bucks use an internal
NFET as a synchronous rectifier to reduce rectifier forward
voltage drop and associated power loss. Synchronous rec-
tification provides a significant improvement in efficiency
whenever the output voltage is relatively low compared to
the voltage drop across an ordinary rectifier diode.
Current Limiting
A current limit feature allows the LP3905 Bucks to protect
Internal and external components during overload condi-
tions. PWM mode implements current limiting using an inter-
nal comparator that trips at 1000 mA (typ). If the output is
shorted to ground the device enters a timed current limit
mode where the NFET is turned on for a longer duration until
the inductor current falls below a low threshold, ensuring
inductor current has more time to decay, thereby preventing
runaway.
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FIGURE 9. Typical PFM Operation
During PFM operation, the converter positions the output
voltage slightly higher than the nominal output voltage during
PWM operation, allowing additional headroom for voltage
drop during a load transient from light to heavy load. The
PFM comparators sense the output voltage via the feedback
pin and control the switching of the output FETs such that the
output voltage ramps between ^~0.6% and ^~1.7% above the
nominal PWM output voltage. If the output voltage is below
the ‘high’ PFM comparator threshold, the PMOS power
switch is turned on. It remains on until the output voltage
reaches the ‘high’ PFM threshold or the peak current ex-
ceeds the I_PFM level set for PFM mode. The typical peak
current in PFM mode is:
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Once the PMOS power switch is turned off, the NMOS
power switch is turned on until the inductor current ramps to
zero. When the NMOS zero-current condition is detected,
the NMOS power switch is turned off. If the output voltage is
below the ‘high’ PFM comparator threshold ), the PMOS
switch is again turned on and the cycle is repeated until the
output reaches the desired level. Once the output reaches
the ‘high’ PFM threshold, the NMOS switch is turned on
briefly to ramp the inductor current to zero and then both
output switches are turned off and the part enters an ex-
tremely low power mode. Quiescent supply current during
this ‘sleep’ mode is 16µA (typ), which allows the part to
achieve high efficiencies under extremely light load condi-
tions. When the output drops below the ‘low’ PFM threshold,
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