COP87L88CF Datasheet, PDF(9/40 Page) National Semiconductor (TI) – 8-Bit CMOS OTP Microcontrollers with 16k Memory and

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COP87L88CF Datasheet, PDF (9/40 Pages) National Semiconductor (TI) – 8-Bit CMOS OTP Microcontrollers with 16k Memory and

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Typical Performance Characteristics (â40ËC to +85ËC) (Continued)

Port D Source Current

Port D Sink Current

DS101134-35

Pin Descriptions

VCC and GND are the power supply pins.

VREF and AGND are the reference voltage pins for the

on-board A/D converter.

CKI is the clock input. This can come from an R/C generated

oscillator, or a crystal oscillator (in conjunction with CKO).

See Oscillator Description section.

RESET is the master reset input. See Reset Description sec-

tion.

The device contains three bidirectional 8-bit I/O ports (C, G

and L), where each individual bit may be independently con-

figured as an input (Schmitt trigger inputs on ports G and L),

output or TRI-STATE under program control. Three data

memory address locations are allocated for each of these

I/O ports. Each I/O port has two associated 8-bit memory

mapped registers, the CONFIGURATION register and the

output DATA register. A memory mapped address is also re-

served for the input pins of each I/O port. (See the memory

map for the various addresses associated with the I/O ports.)

Figure 4 shows the I/O port configurations. The DATA and

CONFIGURATION registers allow for each port bit to be in-

dividually configured under software control as shown below:

CONFIGURA-

TION

DATA

Port Set-Up

Hi-Z Input

(TRI-STATE Output)

Input with Weak Pull-Up

Push-Pull Zero Output

Push-Pull One Output

DS101134-36

FIGURE 4. I/O Port Configurations

DS101134-6

PORT L is an 8-bit I/O port. All L-pins have Schmitt triggers

on the inputs.

Port L supports Multi-Input Wakeup (MIWU) on all eight pins.

L4 and L5 are used for the timer input functions T2A and

T2B. L0 and L1 are not available on the 44-pin version of the

device, since they are replaced by VREF and AGND. L0 and

L1 are not terminated on the 44-pin version. Consequently,

reading L0 or L1 as inputs will return unreliable data with the

44-pin package, so this data should be masked out with user

software when the L port is read for input data. It is recom-

mended that the pins be configured as outputs.

Port L has the following alternate features:

L7 MIWU

L6 MIWU

L5 MIWU or T2B

L4 MIWU or T2A

L3 MIWU

L2 MIWU

L1 MIWU

L0 MIWU

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