COP881C Datasheet, PDF (8/30 Pages) National Semiconductor (TI) – Microcontrollers

COP680C COP681C COP682C
Absolute Maximum Ratings
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage (V_CC)
Voltage at Any Pin
Total Current into V_CC Pin (Source)
6V
b0 3V to V_CC a 0 3V
40 mA
Total Current Out of GND Pin (Sink)
48 mA
Storage Temperature Range
b65 C to a140 C
Note Absolute maximum ratings indicate limits beyond
which damage to the device may occur DC and AC electri-
cal specifications are not ensured when operating the de-
vice at absolute maximum ratings
DC Electrical Characteristics COP68xC b55 C ^s T_A ^s a125 C unless otherwise specified
Parameter
Condition
Min
Typ
Max
Units
Operating Voltage
Power Supply Ripple (Note 1)
Supply Current (Note 2)
CKI e 10 MHz
CKI e 4 MHz
HALT Current (Note 3)
Input Levels
RESET CKI
Logic High
Logic Low
All Other Inputs
Logic High
Logic Low
Hi-Z Input Leakage
Input Pullup Current
G Port Input Hysteresis
Output Current Levels
D Outputs
Source
Sink
All Others
Source (Weak Pull-Up)
Source (Push-Pull Mode)
Sink (Push-Pull Mode)
TRI-STATE Leakage
Allowable Sink Source Current per Pin
D Outputs (Sink)
All Others
Peak to Peak
V_CC e 5 5V tc e 1 ms
V_CC e 5 5V tc e 2 5 ms
V_CC e 5 5V CKI e 0 MHz
V_CC e 5 5V
V_CC e 5 5V V_IN e 0V
V_CC e 4 5V V_OH e 3 8V
V_CC e 4 5V V_OL e 1 0V
V_CC e 4 5V V_OH e 3 2V
V_CC e 4 5V V_OH e 3 2V
V_CC e 4 5V V_OL e 0 4V
V_CC e 5 5V
45
55
V
0 1 V_CC
V
80
mA
44
mA
k₁₀
30
mA
0 9 V_CC
0 7 V_CC
b5
b35
b0 35
9
b9
b0 35
14
b5 0
V
0 1 V_CC
V
V
0 2 V_CC
V
a5
mA
b300
mA
0 35 V_CC
V
mA
mA
b120
mA
mA
mA
a5 0
mA
12
mA
25
mA
Maximum Input Current (Room Temp)
without Latchup (Note 4)
Room Temp
g100
mA
RAM Retention Voltage Vr (Note 5)
500 ns Rise and Fall Time (Min)
25
V
Input Capacitance
7
pF
Load Capacitance on D2
1000
pF
Note 1 Rate of voltage change must be less than 0 5V ms
Note 2 Supply current is measured after running 2000 cycles with a square wave CKI input CKO open inputs at rails and outputs open
Note 3 The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations Test conditions All inputs tied to V_CC L and G ports TRI-STATE
and tied to ground all outputs low and tied to ground
Note 4 Pins G6 and RESET are designed with a high voltage input network for factory testing These pins allow input voltages greater than V_CC and the pins will
have sink current to V_CC when biased at voltages greater than V_CC (the pins do not have source current when biased at a voltage below V_CC) The effective
resistance to V_CC is 750X (typical) These two pins will not latch up The voltage at the pins must be limited to less than 14V
Note 5 To maintain RAM integrity the voltage must not be dropped or raised instantaneously
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