DS92LV1023E Datasheet, PDF (6/13 Pages) National Semiconductor (TI) – 30-66 MHz 10 Bit Bus LVDS Serializer

Serializer Timing Requirements for TCLK
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
t_TCP
t_TCIH
t_TCIL
t_CLKT
Transmit Clock Period
Transmit Clock High Time
Transmit Clock Low Time
TCLK Input Transition
Time
15.15
0.4T
0.4T
T
0.5T
0.5T
3
t_JIT
TCLK Input Jitter
Figure 10
Max
33.33
0.6T
0.6T
6
150
Units
ns
ns
ns
ns
ps
(RMS)
Serializer Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
t_LLHT
t_LHLT
Bus LVDS Low-to-High
Transition Time
Bus LVDS High-to-Low
Transition Time
R_L = 27Ω
C_L=10pF to GND
Figure 3
(Note 4)
0.2
0.25
t_DIS
DIN (0-9) Setup to TCLK R_L = 27Ω,
t_DIH
DIN (0-9) Hold from TCLK
C_L=10pF to GND
Figure 5
t_HZD
DO ± HIGH to
R_L = 27Ω,
TRI-STATE Delay
C_L=10pF to GND
t_LZD
DO ± LOW to TRI-STATE ^{Figure 6}
Delay
(Note 5)
t_ZHD
DO ± TRI-STATE to
HIGH Delay
t_ZLD
DO ± TRI-STATE to LOW
Delay
0
4.0
3
3
5
6.5
t_SPW
t_PLD
t_SD
t_DJIT
SYNC Pulse Width
Serializer PLL Lock Time
Serializer Delay
Deterministic Jitter
R_L = 27Ω
Figure 8
R_L = 27Ω, Figure 9
R_L = 27Ω,
C_L=10pF
to GND,
(Note 6)
30
MHz
66
MHz
5*t_TCP
510*t_TCP
t_TCP+ 1.0
-350
-200
t_TCP+ 2.0
-45
-70
t_RJIT
Random Jitter
R_L = 27Ω,
19
C_L=10pF to GND
Max
Units
0.4
ns
0.4
ns
ns
ns
10
ns
10
ns
10
ns
10
ns
ns
513*t_TCP
ns
t_TCP+ 3.0
ns
190
ps
80
ps
25
ps (RMS)
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. They are not meant to imply that
the devices should be operated at these limits. The table of “Electrical
Characteristics” specifies conditions of device operation.
Note 2: Typical values are given for V_CC = 3.3V and T_A = +25˚C.
Note 3: Current into device pins is defined as positive. Current out of device
pins is defined as negative. Voltages are referenced to ground except VOD,
∆VOD, VTH and VTL which are differential voltages.
Note 4: t_LLHT and t_LHLT specifications are Guranteed By Design (GBD)
using statistical analysis.
Note 5: Because the Serializer is in TRI-STATE mode, the Deserializer will
lose PLL lock and have to resynchronize before data transfer.
Note 6: t_DJIT specifications are Guranteed By Design using statistical
analysis.
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