DS90CR217 Datasheet, PDF (6/15 Pages) National Semiconductor (TI) – +3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 75 MHz

AC Timing Diagrams (Continued)
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FIGURE 3. DS90CR218 (Receiver) CMOS/TTL Output Load and Transition Times
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FIGURE 4. D590CR217 (Transmitter) Input Clock Transition Time
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Note 7: Measurements at V_DIFF = 0V
Note 8: TCCS measured between earliest and latest LVDS edges
Note 9: TxCLK Differential Low→High Edge
FIGURE 5. DS90CR217 (Transmitter) Channel-to-Channel Skew
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FIGURE 6. DS90CR217 (Transmitter) Setup/Hold and High/Low Times
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