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THS4500-EP Datasheet, PDF (5/38 Pages) National Semiconductor (TI) – WIDEBAND, LOW-DISTORTION, FULLY DIFFERENTIAL AMPLIFIER
THS4500-EP
www.ti.com
SLOS832 – JUNE 2013
ELECTRICAL CHARACTERISTICS: VS = ±5 V
Applicable for –55ºC ≤ TJ ≤ +125ºC, RF = RG = 392 Ω, RL = 800 Ω, G = +1, and single-ended input, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
AC PERFORMANCE
Small-signal bandwidth
Gain-bandwidth product
G = +1, PIN = –20 dBm, RF = 392 Ω
G = +2, PIN = –30 dBm, RF = 1 kΩ
G = +5, PIN = –30 dBm, RF = 2.4 kΩ
G = +10, PIN = –30 dBm, RF = 5.1 kΩ
G > +10
370
MHz
175
MHz
70
MHz
30
MHz
300
MHz
Bandwidth for 0.1-dB flatness
Large-signal bandwidth
Slew rate
Rise time
Fall time
Settling time to 0.01%
0.1%
Harmonic distortion
2nd harmonic
PIN = –20 dBm
VP = 2 V
4 VPP Step
2 VPP Step
2 VPP Step
VO = 4 VPP
VO = 4 VPP
G = +1, VO = 2 VPP
f = 8 MHz
f = 30 MHz
150
220
2800
0.4
0.5
8.3
6.3
–82
–71
MHz
MHz
V/μs
ns
ns
ns
ns
dBc
dBc
3rd harmonic
f = 8 MHz
f = 30 MHz
–97
dBc
–74
dBc
Third-order intermodulation distortion
VO= 2 VPP, fC= 30 MHz, RF = 392 Ω,
200 kHz tone spacing
–90
dBc
Third-order output intercept point
fC = 30 MHz, RF = 392 Ω,
Referenced to 50 Ω
49
dBm
Input voltage noise
f > 1 MHz
7
nV/√Hz
Input current noise
f > 100 kHz
1.7
pA/√Hz
Overdrive recovery time
Overdrive = 5.5 V
60
ns
DC PERFORMANCE
Open-loop voltage gain
49
dB
Input offset voltage
-11
6
mV
Average offset voltage drift
±10
μV/°C
Input bias current
6.6
μA
Average bias current drift
±10
nA/°C
Input offset current
2
μA
Average offset current drift
±40
nA/°C
INPUT
Common-mode input range
-5.1
2
V
Common-mode rejection ratio
Input impedance
70
107 || 1
dB
Ω || pF
OUTPUT
Differential output voltage swing
RL = 1 kΩ
±7.25
V
Differential output current drive
RL = 20 Ω
90
mA
Output balance error
PIN = –20 dBm, f = 100 kHz
-58
dB
Closed-loop output impedance (single-
ended)
f = 1 MHz
0.1
Ω
Copyright © 2013, Texas Instruments Incorporated
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