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LP39542 Datasheet, PDF (5/58 Pages) National Semiconductor (TI) – Advanced Lighting Management Unit
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Electrical Characteristics (Notes 2, 11)
Limits in standard typeface are for TJ = 25°C. Limits in boldface type apply over the operating ambient temperature range (-30°C
< TA < +85°C). Unless otherwise noted, specifications apply to the LP39542 Block Diagram with: VDD1 = VDD2 = 3.6V, VDDIO = 2.8V,
CVDD = CVDDIO = 100 nF, COUT = CIN = 10 μF, CVDDA = 1 μF, CREF = 100 nF, L1 = 4.7 μH, RFLASH = 910Ω, RRGB = 5.6 kΩ and RRT
= 82 kΩ (Note 12).
Symbol
Parameter
Condition
Min Typ Max Units
IVDD Standby supply current NSTBY (bit) = L, NRST (pin) = H
(VDD1 + VDD2)
SCL=H, SDA = H
No-boost supply current NSTBY (bit) = H,
(VDD1 + VDD2)
EN_BOOST(bit) = L
SCL = H, SDA = H
Audio sync and LEDs OFF
1
8
μA
450 μA
No-load supply current
(VDD1 + VDD2)
NSTBY (bit) = H,
EN_BOOST (bit) = H
SCL = H, SDA = H
Audio sync and LEDs OFF
Autoload OFF
1
mA
IVDDIO
RGB drivers
(VDD1 + VDD2)
WLED drivers
(VDD1 + VDD2)
Audio synchronization
(VDD1 + VDD2)
Flash
(VDD1 + VDD2)
VDDIO Standby Supply
current
CC mode at R1, G1, B1 and R2, G2, B2 set to 15 mA
SW mode
4+2 banks IOUT = 25.5 mA per LED
Audio sync ON
VDD1,2 = 2.8V
VDD1,2 = 3.6V
I(RFLASH) = 1 mA
Peak current during flash
NSTBY (bit)=L
SCL = H, SDA = H
150
μA
150
500
μA
390
μA
700
2
mA
1
μA
IEXT_LDO
VDDA
External LDO output 7V tolerant application only
current
(VDD1, VDD2, VDDA)
IBOOST = 300 mA
Output voltage of internal (Note 13)
LDO for analog parts
6.5 mA
2.72 2.80 2.88 V
-3
+3
%
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation
of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions,
see the Electrical Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pins.
Note 3: Battery/Charger voltage should be above 6V no more than 10% of the operational lifetime.
Note 4: Voltage tolerance of LP39542 above 6.0V relies on fact that VDD1 and VDD2 (2.8V) are available (ON) at all conditions. If VDD1 and VDD2 are not available
(ON) at all conditions, National Semiconductor does not guarantee any parameters or reliability for this device.
Note 5: The total load current of the boost converter in worst-case conditions is limited to 300 mA (min. input and max. output voltage).
Note 6: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=160°C (typ.) and disengages at
TJ=140°C (typ.).
Note 7: For detailed soldering specifications and information, please refer to National Semiconductor Application Note AN1112 : Micro SMD Wafer Level Chip
Scale Package or Application note AN1412: Micro SMDxt Wafer Lever Chip Scale Package
Note 8: The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin.
Note 9: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125°C), the maximum power
dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
Note 10: Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists,
special care must be paid to thermal dissipation issues in board design.
Note 11: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 12: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.
Note 13: VDDA output is not recommended for external use.
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