COP87L88GG Datasheet, PDF (5/42 Pages) National Semiconductor (TI) – 8-Bit One-Time Programmable OTP Microcontroller with UART and Three Multi-Function Timers

AC Electrical Characteristics b40 C ^s T_A ^s a85 C unless otherwise specified
Parameter
Conditions
Min
Typ
Max
Units
Instruction Cycle Time (t_c)
Crystal Resonator
R C Oscillator
2 7V ^s V_CC ^s 4 5V
25
4 5V ^s V_CC ^s 5 5V
1
2 7V ^s V_CC ^s 4 5V
75
4 5V ^s V_CC ^s 5 5V
3
Inputs
t_SETUP
t_HOLD
4 5V ^s V_CC ^s 5 5V
200
2 7V ^s V_CC ^s 4 5V
500
4 5V ^s V_CC ^s 5 5V
60
2 7V ^s V_CC ^s 4 5V
150
Output Propagation Delay (Note 6)
t_PD1 t_PD0
SO SK
All Others
R_L e 2 2k C_L e 100 pF
4 5V ^s V_CC ^s 5 5V
2 7V ^s V_CC ^s 4 5V
4 5V ^s V_CC ^s 5 5V
2 7V ^s V_CC ^s 4 5V
MICROWIRE Setup Time (t_UWS)
V_CC ^t 4 5V
20
MICROWIRE Hold Time (t_UWH)
V_CC ^t 4 5V
56
MICROWIRE Output Propagation Delay (t_UPD)
V_CC ^t 4 5V
Input Pulse Width (Note 7)
Interrupt Input High Time
10
Interrupt Input Low Time
10
Timer 1 2 3 Input High Time
10
Timer 1 2 3 Input Low Time
10
Reset Pulse Width
10
DC
ms
DC
ms
DC
ms
DC
ms
ns
ns
ns
ns
07
ms
1 75
ms
10
ms
25
ms
ns
ns
220
ns
t_c
t_c
t_c
t_c
ms
t_c e Instruction Cycle Time
Note 1 Maximum rate of voltage change must be k 0 5 V ms
Note 2 Supply and IDLE currents are measured with CKI driven with a square wave Oscillator CKO driven 180 out of phase with CKI inputs connected to V_CC
and outputs driven low but not connected to a load
Note 3 The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations by bringing CKI high Test Conditions All inputs tied to V_CC L and G
ports in the TRI-STATE mode and tied to ground all outputs low and tied to ground The clock monitor is disabled
Note 4 The user must guarantee that D2 pin does not source more than 10 mA during RESET If D2 sources more than 10 mA during reset the device will go into
programming mode
Note 5 Pins G6 and RESET are designed with a high voltage input network These pins allow input voltages l V_CC and the pins will have sink current to V_CC when
biased at voltages l V_CC (the pins do not have source current when biased at a voltage below V_CC) The effective resistance to V_CC is 750X (typical) These two
pins will not latch up The voltage at the pins must be limited to k 14V WARNING Voltages in excess of 14V will cause damage to the pins This warning
excludes ESD transients
Note 6 The output propagation delay is referenced to the end of the instruction cycle where the output change occurs
Note 7 Parameter characterized but not tested
5
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