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COP884BC Datasheet, PDF (46/57 Pages) National Semiconductor (TI) – 8-Bit CMOS ROM Based Microcontrollers with 2k Memory, Comparators, and CAN Interface
MICROWIRE/PLUS (Continued)
FIGURE 39. MICROWIRE/PLUS Application
DS012067-38
TABLE 10. MICROWIRE/PLUS
Master Mode Clock Selection
TABLE 11. MICROWIRE/PLUS Mode Selection
This table assumes that the control flag MSEL is set.
SL1
SL0
0
0
0
1
1
x
Where tc is the instruction cycle clock
SK
2 x tc
4 x tc
8 x tc
MICROWIRE/PLUS Slave Mode Operation
In the MICROWIRE/PLUS Slave mode of operation the SK
clock is generated by an external source. Setting the MSEL
bit in the CNTRL register enables the SO and SK functions
onto the G Port. The SK pin must be selected as an input
and the SO pin is selected as an output pin by setting and re-
setting the appropriate bit in the Port G configuration regis-
ter. Table 2 summarizes the settings required to enter the
Slave mode of operation.
The user must set the BUSY flag immediately upon entering
the Slave mode. This will ensure that all data bits sent by the
Master will be shifted properly. After eight clock pulses the
BUSY flag will be cleared and the sequence may be re-
peated.
G4 (SO)
Config.
Bit
1
0
1
0
G5 (SK)
Config.
Bit
1
1
0
0
G4
Fun.
SO
TRI-
STATE
SO
TRI-
STATE
G5
Fun.
Int.
SK
Int.
SK
Ext.
SK
Ext.
SK
Operation
MICROWIRE/PLUS
Master
MICROWIRE/PLUS
Master
MICROWIRE/PLUS
Slave
MICROWIRE/PLUS
Slave
Alternate SK Phase Operation
The device allows either the normal SK clock or an alternate
phase SK clock to shift data in and out of the SIO register. In
both the modes the SK is normally low. In the normal mode
data is shifted in on the rising edge of the SK clock and the
data is shifted out on the falling edge of the SK clock. The
SIO register is shifted on each falling edge of the SK clock in
the normal mode. In the alternate SK phase mode the SIO
register is shifted on the rising edge of the SK clock.
A control flag, SKSEL, allows either the normal SK clock or
the alternate SK clock to be selected. Resetting SKSEL
causes the MICROWIRE/PLUS logic to be clocked from the
normal SK signal. Setting the SKSEL flag selects the alter-
nate SK clock. The SKSEL is mapped into the G6 configura-
tion bit. The SKSEL flag will power up in the reset condition,
selecting the normal SK signal.
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