LMH6733 Datasheet, PDF (4/16 Pages) Texas Instruments – Single Supply, 1.0 GHz, Triple Operational Amplifier

Symbol
Parameter
Conditions
Min
N_CN
Non-Inverting Current
>10 MHz
Video Performance
DG
Differential Gain
DP
Differential Phase
Static, DC Performance
4.43 MHz, R_L = 150Ω
4.43 MHz, R_L = 150Ω
VIO
Input Offset Voltage (Note 7)
IBN
Input Bias Current (Note 7)
Non-Inverting
−14
−19
IBI
Input Bias Current (Note 7)
Inverting
PSRR
CMRR
XTLK
Power Supply Rejection Ratio
(Note 7)
Common Mode Rejection Ratio
(Note 7)
Crosstalk
I_CC
Supply Current (Note 7)
Supply Current Disabled V⁺
Supply Current Disabled V^−
Miscellaneous Performance
R_IN+
Non-Inverting Input Resistance
C_IN+
R_IN−
R_O
V_O
Non-Inverting Input Capacitance
Inverting Input Impedance
Output Impedance
Output Voltage Range (Note 7)
CMIR
I_O
I_SC
I_IH
I_IL
V_DMAX
V_DMIM
Common Mode Input Range
(Note 7)
Linear Output Current
(Notes 3, 7)
Short Circuit Current (Note 6)
Disable Pin Bias Current High
Disable Pin Bias Current Low
Voltage for Disable
Voltage for Enable
+PSRR
59
−PSRR
58
53
52.5
Input Referred, f = 10 MHz, Drive
Channels A,C Measure Channel B
All Three Amps Enabled, No Load
R_L = ∞
R_L = ∞
Output Impedance of Input Buffer
DC
R_L = 100Ω
R_L = ∞
CMRR > 43 dB
V_IN = 0V, V_OUT < ±42 mV
±3.55
±3.5
±3.85
±3.9
±3.8
70
V_IN = 2V Output Shorted to Ground
Disable Pin = V⁺
Disable Pin = 0V
Disable Pin ≤ V_DMAX
Disable Pin ≥ V_DMIN
Typ
26.9
0.03
0.03
0.6
3.5
5
61.5
61
55
−80
19.5
1.54
0.75
200
1
30
0.05
±3.7
±4.0
±4.0
±80
237
−72
−360
3.2
3.6
Max
Units
pA/
%
Deg
2.2
mV
2.5
19
µA
24
23
26
μA
dB
dB
dB
20.8
mA
22.0
1.8
mA
1.8
mA
kΩ
pF
Ω
Ω
V
V
mA
mA
μA
μA
V
V
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables.
Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)
Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
Note 3: The maximum output current (I_OUT) is determined by device power dissipation limitations. See the Power Dissipation section of the Applications Information
for more details.
Note 4: The maximum power dissipation is a function of T_J(MAX), θ_JA. The maximum allowable power dissipation at any ambient temperature is
P_D = (T_J(MAX) – T_A)/ θ_JA. All numbers apply for packages soldered directly onto a PC Board.
Note 5: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating
of the device such that T_J = T_A. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where
T_J > T_A.
Note 6: Short circuit current should be limited in duration to no more than 10 seconds. See the Power Dissipation section of the Application Section for more
details.
Note 7: Parameter 100% production tested at 25° C.
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