LMH6733 Datasheet, PDF (14/16 Pages) Texas Instruments – Single Supply, 1.0 GHz, Triple Operational Amplifier

termination reduces reflections from the transmission line and
effectively masks transmission line and other parasitic ca-
pacitances from the amplifier output stage. Figure 4 shows a
typical configuration for driving a 75Ω cable. The amplifier is
configured for a gain of two to make up for the 6 dB of loss in
R_OUT.
20199102
FIGURE 7. Maximum Power Dissipation
POWER DISSIPATION
The LMH6733 is optimized for maximum speed and perfor-
mance in the small form factor of the standard SSOP-16
package. To achieve its high level of performance, the
LMH6733 consumes an appreciable amount of quiescent
current which cannot be neglected when considering the total
package power dissipation limit. The quiescent current con-
tributes to about 40° C rise in junction temperature when no
additional heat sink is used (V_S = ±5V, all 3 channels on).
Therefore, it is easy to see that proper precautions need to
be taken in order to make sure the junction temperature’s ab-
solute maximum rating of 150°C is not violated.
To ensure maximum output drive and highest performance,
thermal shutdown is not provided. Therefore, it is of utmost
importance to make sure that the T_JMAX is never exceeded
due to the overall power dissipation (all 3 channels).
With the LMH6733 used in a back-terminated 75Ω RGB ana-
log video system (with 2 V_PP output voltage), the total power
dissipation is around 305 mW of which 220 mW is due to the
quiescent device dissipation (output black level at 0V). With
no additional heat sink used, that puts the junction tempera-
ture to about 120° C when operated at 85°C ambient.
To reduce the junction temperature many options are avail-
able. Forced air cooling is the easiest option. An external add-
on heat-sink can be added to the SSOP-16 package, or
alternatively, additional board metal (copper) area can be uti-
lized as heat-sink.
An effective way to reduce the junction temperature for the
SSOP-16 package (and other plastic packages) is to use the
copper board area to conduct heat. With no enhancement the
major heat flow path in this package is from the die through
the metal lead frame (inside the package) and onto the sur-
rounding copper through the interconnecting leads. Since
high frequency performance requires limited metal near the
device pins the best way to use board copper to remove heat
is through the bottom of the package. A gap filler with high
thermal conductivity can be used to conduct heat from the
bottom of the package to copper on the circuit board. Vias to
a ground or power plane on the back side of the circuit board
will provide additional heat dissipation. A combination of front
side copper and vias to the back side can be combined as
well.
Follow these steps to determine the maximum power dissi-
pation for the LMH6733:
1. Calculate the quiescent (no-load) power: P_AMP = I_CC X
(V_S), where V_S = V⁺-V^−
2. Calculate the RMS power dissipated in the output stage:
P_D (rms) = rms ((V_S - V_OUT) X I_OUT) where V_OUT and
I_OUT are the voltage and the current across the external
load and V_S is the total supply voltage
3. Calculate the total RMS power: P_T = P_AMP+P_D
The maximum power that the LMH6733, package can dissi-
pate at a given temperature can be derived with the following
equation (See Figure 7):
P_MAX = (150°C/W– T_AMB)/ θ_JA, where T_AMB = ambient tem-
perature (°C) and θ_JA = thermal resistance, from junction to
ambient, for a given package (°C/W). For the SSOP package
θ_JA is 120°C/W.
ESD PROTECTION
The LMH6733 is protected against electrostatic discharge
(ESD) on all pins. The LMH6733 will survive 2000V Human
Body Model and 200V Machine Model events.
Under closed loop operation the ESD diodes have no affect
on circuit performance. There are occasions, however, when
the ESD diodes will be evident. If the LMH6733 is driven by
a large signal while the device is powered down the ESD
diodes will conduct.
The current that flows through the ESD diodes will either exit
the chip through the supply pins or will flow through the de-
vice, hence it is possible to power up a chip with a large signal
applied to the input pins. Shorting the power pins to each other
will prevent the chip from being powered up through the input.
EVALUATION BOARDS
National Semiconductor provides the following evaluation
boards as a guide for high frequency layout and as an aid in
device testing and characterization. Many of the datasheet
plots were measured with these boards.
Device
Package Evaluation Board
Part Number
LMH6733MQ
SSOP
LMH730275
A bare evaluation board can be ordered when a sample re-
quest is placed with National Semiconductor.
www.national.com
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