DS90C031 Datasheet, PDF (4/14 Pages) National Semiconductor (TI) – LVDS Quad CMOS Differential Line Driver

Switching Characteristics (Continued)
V_CC = +5.0V, T_A = +25˚C DS90C031T. (Notes 3, 4, 6, 9)
Symbol
Parameter
Conditions
Min
t_TLH
t_THL
t_PHZ
t_PLZ
t_PZH
t_PZL
Rise Time
Fall Time
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
R_L = 100Ω,
C_L = 5 pF
(Figure 4 and Figure 5)
Typ
0.35
0.35
2.5
2.5
2.5
2.5
Max
1.5
1.5
10
10
10
10
Units
ns
ns
ns
ns
ns
ns
Switching Characteristics
V_CC = +5.0V ± 10%, T_A = −40˚C to +85˚C DS90C031T. (Notes 3, 4, 5, 6, 9)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t_PHLD
Differential Propagation Delay High to Low
R_L = 100Ω, C_L = 5 pF
0.5
2.0
3.5
ns
t_PLHD
Differential Propagation Delay Low to High
(Figure 2 and Figure 3)
0.5
2.1
3.5
ns
t_SKD
Differential Skew |t_PHLD – t_PLHD|
0
80
900
ps
t_SK1
Channel-to-Channel Skew (Note 4)
0
0.3
1.0
ns
t_SK2
Chip to Chip Skew (Note 5)
3.0
ns
t_TLH
t_THL
t_PHZ
t_PLZ
t_PZH
t_PZL
Rise Time
Fall Time
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
R_L = 100Ω,
C_L = 5 pF
(Figure 4 and Figure 5)
0.35
2.0
ns
0.35
2.0
ns
2.5
15
ns
2.5
15
ns
2.5
15
ns
2.5
15
ns
Switching Characteristics
V_CC = +5.0V ± 10%, T_A = −55˚C to +125˚C DS90C031E. (Notes 3, 4, 5, 6, 9, 10)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t_PHLD
Differential Propagation Delay High to Low
R_L = 100Ω, C_L = 20 pF
0.5
2.0
5.0
ns
t_PLHD
Differential Propagation Delay Low to High
(Figure 3)
0.5
2.1
5.0
ns
t_SKD
Differential Skew |t_PHLD – t_PLHD|
C_L Connected between
0
0.08
3.0
ns
each Output and GND
t_SK1
Channel-to-Channel Skew (Note 4)
0
0.3
3.0
ns
t_SK2
Chip to Chip Skew (Note 5)
4.5
ns
t_PHZ
Disable Time High to Z
t_PLZ
Disable Time Low to Z
t_PZH
Enable Time Z to High
R_L = 100Ω,
C_L = 5 pF
(Figure 4 and Figure 5)
2.5
20
ns
2.5
20
ns
2.5
20
ns
t_PZL
Enable Time Z to Low
2.5
20
ns
Parameter Measurement Information
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FIGURE 1. Driver V_OD and V_OS Test Circuit
DS011946-3
4