USBN9602 Datasheet, PDF(36/45 Page) National Semiconductor (TI) – USBN9602 (Universal Serial Bus) Full Speed Function Controller With DMA Support

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USBN9602 Datasheet, PDF (36/45 Pages) National Semiconductor (TI) – USBN9602 (Universal Serial Bus) Full Speed Function Controller With DMA Support

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13.0 Memory Map

Table 8 is a memory map showing the addresses of the

USBN9602 registers.

Table 8. USBN9602 Memory Map

Address Register

Name

Function

0x00 MCNTRL Main Control Register

0x01 CCONF Clock Configuration Register

0x02 reserved reserved

0x03 RID

Revision Identifier

0x04 FAR

Function Address Register

0x05 NFSR

Node Functional State Register

0x06 MAEV

Main Event Register

0x07 MAMSK Main Mask Register

0x08 ALTEV

Alternate Event Register

0x09 ALTMSK Alternate Mask Register

0x0A TXEV

Transmit Event Register

0x0B TXMSK Transmit Mask Register

0x0C RXEV

Receive Event Register

0x0D RXMSK Receive Mask Register

0x0E NAKEV NAK Event Register

0x0F NAKMSK NAK Mask Register

0x10 FWEV

FIFO Warning Event Register

0x11 FWMSK FIFO Warning Mask Register

0x12 FNH

Frame Number Register High

Byte

Address Register

Name

Function

0x2B TXC1

Transmit Command Register 1

0x2C EPC2

Endpoint Control Register 2

0x2D RXD1

Receive Data Register 1

0x2E RXS1

Receive Status Register 1

0x2F RXC1

Receive Command Register 1

0x30 EPC3

Endpoint Control Register 3

0x31 TXD2

Transmit Data Register 2

0x32 TXS2

Transmit Status Register 2

0x33 TXC2

Transmit Command Register 2

0x34 EPC4

Endpoint Control Register 4

0x35 RXD2

Receive Data Register 2

0x36 RXS2

Receive Status Register 2

0x37 RXC2

Receive Command Register 2

0x38 EPC5

Endpoint Control Register 5

0x39 TXD3

Transmit Data Register 3

0x3A TXS3

Transmit Status Register 3

0x3B TXC3

Transmit Command Register 3

0x3C EPC6

Endpoint Control Register 6

0x3D RXD3

Receive Data Register 3

0x3E RXS3

Receive Status Register 3

0x3F RXC3

Receive Command Register 3

0x13

0x14

FNL

DMA

CNTRL

Frame Number Register Low Byte

DMA Control Register

0x15- reserved reserved

0x1F

0x20

0x21

0x22

0x23

EPC0

TXD0

TXS0

TXC0

Endpoint Control Register 0

Transmit Data Register 0

Transmit Status Register 0

Transmit Command Register 0

0x24

0x25

0x26

reserved

RXD0

RXS0

reserved

Receive Data Register 0

Receive Status Register 0

0x27

0x28

0x29

0x2A

RXC0

EPC1

TXD1

TXS1

Receive Command Register 0

Endpoint Control Register 1

Transmit Data Register 1

Transmit Status Register 1

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