PC87383 Datasheet, PDF (35/77 Pages) National Semiconductor (TI) – Legacy-Reduced SuperI/O with Fast Infrared Port, Serial Port, Parallel Port and GPIOs for Portable Applications

3.0 Device Architecture and Configuration (Continued)
3.10 SERIAL PORT 1 CONFIGURATION
3.10.1 Logical Device 3 (SP1) Configuration
Table 18 lists the configuration registers that affect the Serial Port 1. Only the last register (F0h) is described here. See Sec-
tions 3.2.3 and 3.2.4 for descriptions of the other registers.
Table 18. Serial Port 1 Configuration Registers
Index
Configuration Register or Action
Type
30h Activate. See also bit 0 of the SIOCF1 register and bit 3 of the SIOCF6 register. R/W
60h Base Address MSB register. Bits 7-3 (for A15-11) are read only, 00000b.
R/W
61h Base Address LSB register. Bit 2-0 (for A2-0) are read only, 000b.
R/W
70h Interrupt Number and Wake-Up on IRQ Enable register.
R/W
71h Interrupt Type. Bit 1 is R/W; other bits are read only.
R/W
74h Report no DMA Assignment.
RO
75h Report no DMA Assignment.
RO
F0h Serial Port 1 Configuration register.
R/W
Reset
00h
03h
F8h
04h
03h
04h
04h
02h
3.10.2 Serial Port 1 Configuration Register
This register is reset by hardware to 02h.
Location: Index F0h
Type: R/W
Bit
Name
Reset
7
6
Bank
Select
Enable
0
0
5
4
Reserved
0
0
3
2
1
0
Busy
Indicator
Power
Mode
Control
TRI-STATE
Control
0
0
1
0
Bit
Description
7 Bank Select Enable. Enables bank switching for Serial Port 1.
0: Disabled (default).
1: Enabled.
6-3 Reserved.
2 Busy Indicator. This read-only bit can be used by power management software to decide when to power down
the Serial Port 1 logical device.
0: No transfer in progress (default).
1: Transfer in progress.
1 Power Mode Control. When the logical device is active in:
0: Low power mode
Serial Port 1 clock disabled. The output signals are set to their default states. The RI input signal can be
programmed to generate an interrupt. Register values are maintained (unlike Active bit in Index 30, which also
prevents access to Serial Port 1 registers).
1: Normal power mode
Serial Port 1 clock enabled. Serial Port 1 is functional when the logical device is active (default).
0 TRI-STATE Control. When enabled and the device is inactive, the logical device output pins are in TRI-STATE.
0: TRI-STATE disabled (default).
1: TRI-STATE enabled.
Revision 1.1
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