OPA2832 Datasheet, PDF (3/37 Pages) National Semiconductor (TI) – Dual, Low-Power, High-Speed, Fixed-Gain Operational Amplifier

OPA2832
www.ti.com ............................................................................................................................................. SBOS327C – FEBRUARY 2005 – REVISED AUGUST 2008
ELECTRICAL CHARACTERISTICS: V_S = ±5V
Boldface limits are tested at +25C.
At T_A = +25°C, G = +2V/V, and R_L = 150Ω to GND, unless otherwise noted (see Figure 63).
OPA2832ID, IDGK
PARAMETER
CONDITIONS
+25°C
0°C to –40°C to
+25°C⁽¹⁾ +70°C⁽²⁾ +85°C⁽²⁾
AC PERFORMANCE (see Figure 63)
Small-Signal Bandwidth
Peaking at a Gain of +1
Slew Rate
G = +1, V_O ≤ 0.5V_PP
G = +2, V_O ≤ 0.5V_PP
G = –1, V_O ≤ 0.5V_PP
V_O ≤ 0.5V_PP
G = +2, 2V Step
250
70
55
54
54
85
57
56
55
6
300
220
210
200
Rise Time
0.5V Step
5.6
5.8
6.0
6.0
Fall Time
0.5V Step
5.6
5.8
6.0
6.0
Settling Time to 0.1%
G = +2, 1V Step
45
63
65
66
Harmonic Distortion
2nd-Harmonic
3rd-Harmonic
Input Voltage Noise
V_O = 2V_PP, 5MHz
R_L = 150Ω
R_L = 500Ω
R_L = 150Ω
R_L = 500Ω
f > 1MHz
–64
–60
–58
–58
–66
–63
–61
–61
–57
–50
–49
–48
–73
–64
–60
–57
9.2
Input Current Noise
f > 1MHz
2.2
NTSC Differential Gain
NTSC Differential Phase
DC PERFORMANCE⁽⁴⁾
R_L = 150Ω
R_L = 150Ω
0.10
0.16
Gain Error
G = +2
±0.3
±1.5
±1.6
±1.7
G = –1
±0.2
±1.5
±1.6
±1.7
Internal R_F and R_G
Maximum
400
455
460
462
Minimum
400
345
340
338
Average Drift
±0.1
±0.1
Input Offset Voltage
±1.4
±7.5
±8.7
±9.3
Average Offset Voltage Drift
—
±27
±27
Input Bias Current
+5.5
+10
+12
+13
Input Bias Current Drift
—
±45
±45
Input Offset Current
±0.1
±1.5
±2
±2.5
Input Offset Current Drift
—
±10
±10
INPUT
Negative Input Voltage Range
–5.4
–5.2
–5.0
–4.9
Positive Input Voltage Range
3.2
3.1
3.0
2.9
Input Impedance
Differential Mode
10 || 2.1
Common-Mode
400 || 1.2
OUTPUT
Output Voltage Swing
Current Output, Sinking and Sourcing
R_L = 1kΩ to GND
R_L = 150Ω to GND
±4.9
±4.8
±4.75 ±4.75
±4.6
±4.5
±4.45
±4.4
±82
±63
±58
±53
Short-Circuit Current
Output Shorted to Either Supply
120
Closed-Loop Output Impedance
G = +2, f ≤ 100kHz
0.2
UNITS
MHz
MHz
MHz
dB
V/µs
ns
ns
ns
dBc
dBc
dBc
dBc
nV/√Hz
pA/√Hz
%
°
%
%
Ω
Ω
%/°C
mV
µV/°C
µA
nA/°C
µA
nA/°C
V
V
kΩ || pF
kΩ || pF
V
V
mA
mA
Ω
MIN/
TEST
MAX LEVEL⁽³⁾
typ
V
min
B
min
B
typ
C
min
B
max
B
max
B
max
B
max
B
max
B
max
B
max
B
typ
C
typ
C
typ
C
typ
C
min
A
max
B
max
A
max
A
max
B
max
A
max
B
max
A
max
B
max
A
max
B
max
B
min
B
typ
C
typ
C
max
A
max
A
min
A
typ
C
typ
C
(1) Junction temperature = ambient for +25°C specifications.
(2) Junction temperature = ambient at low temperature limits; junction temperature = ambient +5°C at high temperature limit for over
temperature specifications.
(3) Test levels: (A) 100% tested at +25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and
simulation. (C) Typical value only for information.
(4) Current is considered positive out of node.
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