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LP3927 Datasheet, PDF (3/16 Pages) National Semiconductor (TI) – Cellular/PCS System Power Management IC
Pin Description
Pin
Name
Functional Description
1
VO1
150 mA, LDO1 output pin.
2
EN5
LDO5 enable input.
3
EN4
LDO4 enable input.
4
EN3
LDO3 enable input.
5
RST
Externally pulled high, open drain output to processor/memory reset.
6
IRQ
Externally pulled high, open drain output to processor interrupt indicating KYBD has gone
high.
7
PS_HOLD Input from the processor to the LP3927. A HIGH indicates a steady supply of power is
granted. Refer to ’Application Hints’ section for more detail.
8
KYBD
An active high input signal indicating the keyboard “On/Off” button has been asserted. Refer
to ’Application Hints’ section for more detail.
9
D_GND
Digital ground, used primarily for the digital and DAC circuits.
10
VEXT
Active low input indicating a battery charger insertion Refer to ’Application Hints’ section for
more detail.
11
BYP
Reference bypass pin.
12 TEST_MODE Pin used for production testing, factory use only. This pin should be grounded in applications.
13
LED_EN LED driver enable input.
14
LED
LED driver, drain connection of the LED drive MOSFET.
15
LED_PGM LED drive current programming pin.
16 OP_AMP_OUT Operational amplifier output pin.
17
IN−
− input of the Op-Amp.
18
IN+
+ input of the Op-Amp.
19 OP_AMP_VDD Power supply pin for Op-Amp.
20
A_GND2 Ground for analog.
21
VO5
200 mA, LDO5 output pin.
22
VDD3
Input power pin for LDO5. VDD1, VDD2 and VDD3 must be tied together externally.
23
VO4
150 mA, LDO4 output pin.
24
VDD2
Input power pin for LDO3 and LDO4. VDD1, VDD2 and VDD3 must be tied together externally.
25
VO3
100 mA, LDO3 output pin.
26
A_GND1 Ground for analog.
27
VO2
200 mA, LDO2 output pin.
28
VDD1
Input power pin for LDO1 and LDO2. VDD1, VDD2 and VDD3 must be tied together externally.
3
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