LP3927 Datasheet, PDF (1/16 Pages) National Semiconductor (TI) – Cellular/PCS System Power Management IC

August 2002
LP3927
Cellular/PCS System Power Management IC
General Description
The LP3927 system power management IC is designed for
cellular/PCS handsets as well as other portable systems that
require intelligent power management. Each device contains
five low-dropout linear regulators (LDO’s), a reset timer, a
power-up control logic, a general-purpose open drain output
that can be used to light LEDs, and a CMOS rail-to-rail
input/output operational amplifier.
Each linear regulator features an extremely low dropout
voltage of 100 mV (typ) at maximum output current. LDO1
and LDO2 are powered on and off by either the KYBD or the
VEXT pin. LDO3, LDO4 and LDO5 each have its indepen-
dent enable pin. LDO1 and LDO4 are rated at 150 mA each,
LDO2 and LDO5 are rated at 200 mA each and LDO3 is
rated at 100 mA. All LDO’s are optimized for low noise and
high isolation.
The open drain output current sink can be programmed up to
150 mA by using an external low cost resistor.
A single supply, low voltage operational amplifier has rail to
rail input and output with 600 kHz of gain-bandwidth product.
Key Specifications
n 3.0V to 5.5V Input Voltage Range
n Two 200 mA, Two 150 mA and One 100 mA LDO’s
n 100 mV typ Dropout Voltage @ I_MAX
n 150 mA General-Purpose Open-drain programmable
current sink for back light LED
n Low Voltage Rail to Rail Input/Output Operational
Amplifier
n 28 pin LLP package
Applications
n Cellular/PCS handsets
n PDA’s, Palmtops, and portable terminals
n Single–Cell Li+ Systems
n 2- or 3- Cell NiMH, NiCd or Alkaline System
Typical Application Circuit
V_DD1, V_DD2 and V_DD3 must be tied together externally. Collectively called V_DD.
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