LP2994 Datasheet, PDF (3/15 Pages) National Semiconductor (TI) – DDR Termination Regulator

Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
PVIN, AVIN, VTT, VDDQ, SD to GND
Storage Temp. Range
Junction Temperature
Lead Temperature (Soldering, 10 sec)
ESD Rating (Note 2)
−0.3V to +6V
−65˚C to +150˚C
150˚C
260˚C
2kV
Operating Range
Junction Temp. Range (Note 3)
AVIN Supply Voltage
PVIN Supply Voltage
SD Input Voltage
VTT Output Voltage
SO-8 Thermal Resistance (θ_JA)
0˚C to +125˚C
2.2V to 5.5V
-0.3V to (AVIN +
0.3V)
-0.3V to (AVIN +
0.3V)
-0.3V to (PVIN +
0.3V)
151˚C/W
Electrical Characteristics Specifications with standard typeface are for T_J = 25˚C and limits in boldface
type apply over the full Operating Temperature Range (T_J = 0˚C to +125˚C). Unless otherwise specified,
AVIN = PVIN = 2.5V, VDDQ = 2.5V (Note 4).
Symbol
V_TT
I_q
Z_VDDQ
I_QSD
I_SD
V_IH
V_IL
∆V_TT/V_TT
I_SENSE
Parameter
V_TT Output Voltage
I_OUT = 0A (Note 5)
Quiescent Current
VDDQ Input Impedance
Quiescent current in
shutdown
Shutdown Leakage
Current
Minimum Shutdown High
Level
Maximum Shutdown Low
Level
Load Regulation
(Note 7)
SENSE Input Current
Conditions
VIN=VDDQ = 2.3V
VIN=VDDQ = 2.5V
VIN=VDDQ = 2.7V
I_OUT = 0A
(Note 6)
SD = 0V
SD = 2.5V
I_OUT = 0 to 1.5A
I_OUT = 0 to −1.5A
Min
1.108
1.210
1.305
86
1.9
Typ
1.138
1.236
1.334
272
100
21
2
2
-0.4
+0.4
100
Max
1.168
1.260
1.360
400
45
5
0.8
Units
V
µA
kΩ
µA
µA
nA
V
V
%
pA
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating range indicates conditions for which the device is
intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and test conditions see Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed
test conditions.
Note 2: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
Note 3: At elevated temperatures, devices must be derated based on thermal resistance. The device in the SO-8 package must be derated at θ_JA = 151.2˚ C/W
junction to ambient with no heat sink.
Note 4: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control
(SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 5: VIN is defined as the VIN = AVIN = PVIN
Note 6: Quiescent current defined as the current flow into AVIN.
Note 7: Load regulation is tested by using a 10ms current pulse and measuring V_TT.
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