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LMH1980 Datasheet, PDF (3/14 Pages) National Semiconductor (TI) – Auto-Detecting SD/HD/PC Video Sync Separator
Note 11: Maximum voltage offset (DC bounce) between 2 consecutive input sync tips must be less than 25 mVPP; otherwise, this may cause incorrect output
signals to occur.
Note 12: Outputs are negative-polarity logic signals, except for Odd/Even Field.
LMH1980 Test Circuit
FIGURE 2. Test Circuit
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The LMH1980 test circuit is shown in Figure 2. The video generator should provide a clean, low-noise video input signal with
minimal sync pulse overshoot over 75Ω coaxial cable, which should be impedance-matched with a 75Ω load termination resistor
to prevent unwanted signal distortion. The output waveforms should be monitored using a low-capacitance probe on an oscilloscope
with at least 500 MHz bandwidth. See the PCB LAYOUT CONSIDERATIONS section for more information about signal and supply
trace routing and component placement. Also, refer to the “LMH1980 Evaluation Board Instruction Manual” Application Note
(AN-1618).
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