LMH1980 Datasheet, PDF (11/14 Pages) National Semiconductor (TI) – Auto-Detecting SD/HD/PC Video Sync Separator

30010313
FIGURE 13. Bi-modal Timing on HSync's Trailing Edge
for Half-Width Pulses for NTSC
Vertical Sync Output
VSOUT (pin 7) produces a negative-polarity vertical sync sig-
nal, or VSync. VSync's negative-going leading edge is de-
rived from the first vertical serration pulse with a propagation
delay, and its output pulse width, T_VSOUT, spans approximate-
ly three horizontal periods (3H). When there is no vertical
serration pulses (i.e.: non-standard video signal), the
LMH1980 will output a default VSync pulse derived from the
input's vertical sync leading edge with a propagation delay.
Composite Sync Output
CSOUT (pin 8) simply reproduces the video input sync pulses
below the video blanking level. This is obtained by clamping
the video signal sync tip to the internal clamp voltage at V_IN
and extracting the resultant composite sync signal, or CSync.
For both bi-level and tri-level syncs, CSync's negative-going
leading edge is derived from the input's negative-going lead-
ing edge with a propagation delay.
Burst/Back Porch Timing Output
BPOUT (pin 9) provides a negative-polarity burst/back porch
signal, which is pulsed low for a fixed width during the back
porch interval following the input's sync pulse. The burst/back
porch timing pulse is useful as a burst gate signal for NTSC/
PAL color burst synchronization and as a clamp signal for
black level clamping (DC restoration) and sync stripping ap-
plications.
For SDTV formats, the back porch pulse's negative-going
leading edge is derived from the input's positive-going sync
edge with a propagation delay, and the pulse width spans an
appropriate duration of the color burst envelope for NTSC/
PAL. For EDTV formats, the back porch pulse behaves similar
to the SDTV case except with a narrow pulse width. For HDTV
formats, the pulse's leading edge is derived from the input's
negative-going trailing sync edge with a propagation delay,
and the pulse width is narrow to correspond with the short
back porch durations. During the vertical sync period, the
back porch output will be muted (no pulses) and remain logic
high.
Odd/Even Field Output
OEOUT (pin 10) provides an odd/even field output signal,
which facilitates identification of odd and even fields for inter-
laced or segmented frame (sF) formats. For interlaced or
segmented frame formats, the odd/even output is logic high
during an odd field (field 1) and logic low during an even field
(field 2). The odd/even output edge transitions align with
VSync's leading edge to designate the start of odd and even
fields. For progressive (non-interlaced) video formats, the
output is held constantly at logic high.
HD Detect Flag Output
HD (pin 5) is an active-low flag output that only outputs a logic
low signal when a valid HD video input (i.e.: 720P, 1080I and
1080P) with tri-level sync is detected; otherwise, it will output
logic high. Note that there is a processing delay (within 1 to 2
video fields) from when an HD video signal is applied to when
the outputs are correct and the HD flag changes from logic
high (default) to logic low, to indicate a valid HD input has
been detected.
The HD flag can be used to disable an external switch-con-
trolled SD chroma filter when HD video is detected and con-
versely, enable it when SD video is detected. This is important
because a non-switched chroma filter attenuates signal com-
ponents above 500 kHz to 3 MHz, which could roll-off and/or
attenuate the high bandwidth HD tri-level sync signal prior to
the LMH1980 and may increase output propagation delay and
jitter. See the Input Filtering section for more information.
ADDITIONAL CONSIDERATIONS
Using an AC-Coupled Video Source into the LMH1980
An AC coupled video source typically has a 100 µF or larger
output coupling capacitor (C_OUT) for protection and to remove
the DC bias of the amplifier output from the video signal.
When the video source is load terminated, the average value
of the video signal will shift dynamically as the video duty cycle
varies due to the averaging effect of the C_OUT and termination
resistors. The average picture level or APL of the video con-
tent is closely related to the duty cycle.
For example, a significant decrease in APL such as a white-
to-black field transition will cause a positive-going shift in the
sync tips characterized by the source’s RC time constant, t_RC-
OUT ^(150Ω*COUT^{). The LMH1980’s input clamp circuitry may}
have difficulty stabilizing the input signal under this type of
shifting; consequently, the unstable signal at V_IN may cause
missing sync output pulses to result, unless a proper value
for C_IN is chosen.
To avoid this potential problem when interfacing AC-coupled
sources to the LMH1980, it’s necessary to introduce a voltage
droop component via C_IN to compensate for video signal shift-
ing related to changes in the APL. This can be accomplished
by selecting C_IN such that the effective time constant of the
LMH1980’s input circuit, t_RC-IN, is less than t_RC-OUT.
The effective time constant of the input circuit can be approx-
imated as: t_RC-IN = (R_S+R_I)*C_IN*T_LINE/T_CLAMP, where
R_S = 150Ω, R_I = 1 kΩ (input resistance when clamping),
T_LINE ∼ 64 μs for NTSC, and T_CLAMP = 250 ns (internal clamp
duration). A white-to-black field transition in NTSC video
through C_OUT will exhibit the maximum sync tip shifting due to
its long line period (T_LINE). By setting t_RC-IN < t_RC-OUT, the max-
imum value of C_IN can be calculated to ensure proper opera-
tion under this worst-case condition.
For instance, t_RC-OUT is about 33 ms for C_OUT = 220 µF. To
ensure t_RC-IN < 33 ms, C_IN must be about 100 nF or less. By
choosing C_IN = 47 nF, the LMH1980 will function properly with
AC-coupled video sources using C_OUT ≥ 220 μF.
PCB LAYOUT CONSIDERATIONS
Please refer to the “LMH1980 Evaluation Board Instruction
Manual” Application Note (AN-1618) for a good PCB layout
11
www.national.com