LMH1980 Datasheet, PDF (12/14 Pages) National Semiconductor (TI) – Auto-Detecting SD/HD/PC Video Sync Separator

example, which adheres to the following suggestions for com-
ponent placement and signal routing.
LMH1980 IC Placement
The LMH1980 should be placed such that critical signal paths
are short and direct to minimize PCB parasitics from degrad-
ing the video input and logic output signals.
Ground Plane
A two-layer, FR-4 PCB is sufficient for this device. One of the
PCB layers should be dedicated to a single, solid ground
plane that connects to the GND pin of the device and connects
to other components, serving as the common ground refer-
ence. It also helps to reduce trace inductances and minimize
ground loops. Routing supply and signal traces on another
layer can help to maintain as much ground plane continuity
as possible.
Power Supply Routing
The power supply pin should be connected using short traces
with minimal inductance. When routing the supply traces, try
not to disrupt the solid ground plane.
For high frequency bypassing, place 0.1 µF and 0.01 µF SMD
ceramic bypass capacitors with very short connections to
V_CC and GND pins. Place a 4.7 or 10 µF SMD tantalum by-
pass capacitor nearby the V_CC for low frequency supply by-
passing.
R_EXT Resistor
The R_EXT resistor should be a 10 kΩ 1% SMD precision re-
sistor. Place R_EXT as close as possible to the device and
connect to pin 1 and the ground plane using the shortest pos-
sible connections. All input and output signals should be kept
as far as possible from this pin to prevent unwanted signals
from coupling into this bias reference pin.
Video Input
The input signal path should be routed using short, direct
traces between video source and input pin. Use a 75Ω load
termination on the board, if not on the cable. If applicable, the
chroma filter components should be connected using short
traces and the filter capacitor should be connected to the
ground plane. There should be a sufficient return path from
the LMH1980 back to the input source via the ground plane.
Output Routing
The output signal paths should be routed using short, direct
traces to minimize parasitic effects that may degrade these
high-speed logic signals. The logic outputs do not have high
output drive capability. Each output should have a resistive
load of about 10kΩ or more and capacitive load of about 10pF
including parasitic capacitances for optimal signal quality.
Each output can be protected against brief short-circuit
events using a small series resistor, like 100Ω, to limit output
current.
www.national.com
12