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LMC2626 Datasheet, PDF (3/6 Pages) National Semiconductor (TI) – CMOS LDOR/Buffer Chip for Row Inversion Flat Panel Display Systems
DC Electrical Characteristics
Unless otherwise specified all limits guaranteed for b20 C s TA s a85 C P5V e 5V and 4 5V s VIN s 5 5V VREF e 1 227V
SYNC(OPEN) SD(OPEN) k P5V e VIN e 5V (Continued)
Buffer
Symbol
VOUT
VOL
VOH
DVOUT
VIH
SYNC SD
VIL
SYNC SD
IIL(SYNC)
IIH(SYNC)
IOUT-AVE
RON
N-Channel
RON
P-Channel
RON
Matching
Is
Parameter
Peak to Peak Output
Voltage Swing or VOUT
Low Level Output
Voltage
High Level Output
Voltage
Variation of VOUT
Over Temperature
High Level Input
Voltage
Low Level Input
Voltage
Low Level Input
Current for SYNC
High Level Input
Current for SYNC
VOUT Maximum Average
Load Current from (see Note 2)
On Resistance
On Resistance
On Resistance
Supply Current
from P5V
Conditions
SYNC e 5Vpp
(no load)
SYNC e 0V
(No Load)
SYNC e 5V
(No Load)
SYNC e 0V
SYNC e 5VDC
SYNC e 5VPP
IL e 150 mA
TA e 27 C
IL e 150 mA
TA e 27 C
IL e 150 mA
TA e 27 C
No SYNC
Min
4 997
02
35
50
170
200
Typ
(Note 9)
4 999
02
4 999
1
5
0
42
215
09
07
0 18
355
Max
2
3
15
1000
275
100
15
12
06
950
Units
V
mV
V
mV
V
V
nA
mA
mA
X
X
X
mA
3