DS99R101 Datasheet, PDF (3/24 Pages) National Semiconductor (TI) – 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer

Symbol
Parameter
Conditions
Pin/Freq.
V_OD
Output Differential Voltage R_L = 100Ω
(D_OUT+)–(D_OUT−)
VODSEL = L (Figure 10)
Tx: D_OUT+, D_OUT−
R_L = 100Ω
VODSEL = H (Figure 10)
ΔV_OD
Output Differential Voltage
Unbalance
R_L = 100Ω
V_OS
ΔV_OS
I_OS
Offset Voltage
Offset Voltage Unbalance
Output Short Circuit Current
R_L = 100Ω
R_L = 100Ω
DOUT = 0V, DIN = H,
TPWDNB, DEN = 2.4V,
VODSEL = L
DOUT = 0V, DIN = H,
TPWDNB, DEN = 2.4V,
VODSEL = H
I_OZ
TRI-STATE Output Current TPWDNB, DEN = 0V,
DOUT = 0V or 2.4V
SER/DES SUPPLY CURRENT (DVDD*, PVDD* and AVDD* pins) *Digital, PLL, and Analog VDDs
I_DDT
Serializer (Tx)
Total Supply Current
(includes load current)
R_L = 100Ω
VODSEL = L
Checker-board pattern (Figure 1)
f = 40 MHz
R_L = 100Ω
VODSEL = H
Checker-board pattern (Figure 1)
f = 40 MHz
I_DDTZ
Serializer (Tx)
TPWDNB = 0V
Supply Current Power-down (All other LVCMOS Inputs = 0V)
I_DDR
Deserializer (Rx)
Total Supply Current
(includes load current)
C_L = 8 pF LVCMOS Output
Checker-board pattern
(Figure 2)
f = 40 MHz
Deserializer (Rx)
Total Supply Current
(includes load current)
C_L = 8 pF LVCMOS Output
Random pattern
f = 40 MHz
I_DDRZ
Deserializer (Rx)
Supply Current Power-down
RPWDNB = 0V
(All other LVCMOS Inputs = 0V,
R_IN+/ R_IN- = 0V)
Min Typ Max Units
250 400 600 mV
450 750 1200 mV
4 50 mV
1.00 1.25 1.50 V
1 50 mV
−2 −5 −8 mA
−7 −10 −13 mA
−15 ±1 +15 µA
40 80 mA
40 85 mA
1 100 µA
95 mA
90 mA
1 50 µA
3
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