DS90LV012A Datasheet, PDF (3/8 Pages) National Semiconductor (TI) – 3V LVDS Single CMOS Differential Line Receiver

Switching Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. (Notes 6, 7)
Symbol
Parameter
Conditions
Min Typ Max Units
t_PHLD
t_PLHD
t_SKD1
t_SKD3
t_SKD4
t_TLH
t_THL
f_MAX
Differential Propagation Delay High to Low
Differential Propagation Delay Low to High
Differential Pulse Skew |t_PHLD − t_PLHD| (Note 8)
Differential Part to Part Skew (Note 9)
Differential Part to Part Skew (Note 10)
Rise Time
Fall Time
Maximum Operating Frequency (Note 12)
C_L = 15 pF
V_ID = 200 mV
(Figure 1 and Figure 2)
1.0 1.8 3.5 ns
1.0 1.7 3.5 ns
0
100 400 ps
0
0.3 1.0 ns
0
0.4 1.5 ns
350 800 ps
175 800 ps
200 250
MHz
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground unless otherwise
specified (such as V_ID).
Note 3: All typicals are given for: V_DD = +3.3V and T_A = +25˚C.
Note 4: ESD Ratings:
DS90LV012A:
HBM (1.5 kΩ, 100 pF) ≥ 2kV
EIAJ (0Ω, 200 pF) ≥ 900V
CDM ≥ 2000V
IEC direct (330Ω, 150 pF) ≥ 5kV
DS90LT012A:
HBM (1.5 kΩ, 100 pF) ≥ 2kV
EIAJ (0Ω, 200 pF) ≥ 700V
CDM ≥ 2000V
IEC direct (330Ω, 150 pF) ≥ 7kV
Note 5: Output short circuit current (I_OS) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted at a time, do not
exceed maximum junction temperature specification.
Note 6: C_L includes probe and jig capacitance.
Note 7: Generator waveform for all tests unless otherwise specified: f = 1 MHz, Z_O = 50Ω, t_r and t_f (0% to 100%) ≤ 3 ns for IN±.
Note 8: t_SKD1 is the magnitude difference in differential propagation delay time between the positive-going-edge and the negative-going-edge of the same channel.
Note 9: t_SKD3, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices at the same V_DD
and within 5˚C of each other within the operating temperature range.
Note 10: t_SKD4, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices over the
recommended operating temperature and voltage ranges, and across process distribution. t_SKD4 is defined as |Max − Min| differential propagation delay.
Note 11: V_DD is always higher than IN+ and IN− voltage. IN+ and IN− are allowed to have voltage range −0.05V to +2.35V when V_DD = 2.7V and |V_ID| / 2 to
V_DD − 0.3V when V_DD = 3.0V to 3.6V. V_ID is not allowed to be greater than 100 mV when V_CM = 0.05V to 2.35V when V_DD = 2.7V or when V_CM = |V_ID| / 2 to
V_DD − 0.3V when V_DD = 3.0V to 3.6V.
Note 12: f_MAX generator input conditions: t_r = t_f < 1 ns (0% to 100%), 50% duty cycle, differential (1.05V to 1.35 peak to peak). Output criteria: 60%/40% duty cycle,
V_OL (max 0.4V), V_OH (min 2.4V), load = 15 pF (stray plus probes). The parameter is guaranteed by design. The limit is based on the statistical analysis of the device
over the PVT range by the transition times (t_TLH and t_THL).
Parameter Measurement Information
20015003
FIGURE 1. Receiver Propagation Delay and Transition Time Test Circuit
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