DS90C124 Datasheet, PDF (3/17 Pages) National Semiconductor (TI) – 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer

Electrical Characteristics (Continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Pin/Freq.
Min Typ Max Units
LVDS DC SPECIFICATIONS
V_OD
Output Differential Voltage R_L = 100Ω, w/o pre-emphasis D_OUT+, D_OUT−
(D_OUT+)–(D_OUT−) (Figure 16) VODSEL = L
(VODSEL = H)
250 400 600 mV
(500) (800) (1200)
∆V_OD Output Differential Voltage
Unbalance
R_L = 100Ω, w/o pre-emphasis
10 50 mV
V_OS
∆V_OS
I_OS
Offset Voltage
Offset Voltage Unbalance
Output Short Circuit Current
R_L = 100Ω, w/o pre-emphasis
R_L = 100Ω, w/o pre-emphasis
DOUT = 0V, DIN = H,
TPWRDND = 2.4V
1.05 1.2 1.25 V
10 50 mV
−35 −50 −70 mA
I_OZ
TRI-STATE Output Current TPWRDND = 0.8V,
DOUT = 0V or V_DD
−10 ±1 10 µA
SER/DES SUPPLY CURRENT (DVDD*, PVDD* and AVDD* pins) *Digital, PLL, and Analog VDDs
I_CCT Serializer (Tx)
Total Supply Current
(includes load current)
R_L = 100Ω
Pre-emphasis = OFF
Checker-board pattern
VODSEL=L (Figure 1)
f = 35 MHz
105
mA
R_L = 100Ω
RPRE = 6 kΩ
Checker-board pattern
VODSEL=L (Figure 1)
f = 35 MHz
120
mA
Serializer (Tx)
Total Supply Current
(includes load current)
R_L = 100Ω
R_PRE = OFF
Random pattern
VODSEL=L
f = 35 MHz
65
mA
R_L = 100Ω
R_PRE = 6 kΩ
Random pattern
VODSEL=L
f = 35 MHz
80
mA
I_CCTZ
Serializer (Tx)
TPWRDNB = 0.8V
Supply Current Power-down
200 500 µA
I_CCR
Deserializer (Rx)
Total Supply Current
(includes load current)
C_L = 8 pF
Checker-board pattern
LVTTL Output (Figure 2)
f = 35 MHz
180
mA
Deserializer (Rx)
Total Supply Current
(includes load current)
C_L = 8 pF
Random pattern
LVTTL Output
f = 35 MHz
110
mA
I_CCRZ Deserializer (Rx)
RPWRDND = 0.8V
Supply Current Power-down
500 750 µA
Serializer Timing Requirements for TCLK
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
t_TCP
t_TCIH
t_TCIL
t_CLKT
t_JIT
Transmit Clock Period
Transmit Clock High Time
Transmit Clock Low Time
TCLK Input Transition Time
TCLK Input Jitter
(Note 9)
Min
28.6
0.4T
0.4T
Typ
T
0.5T
0.5T
3
Max Units
200 ns
0.6T ns
0.6T ns
6 ns
±200 ns
3
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