DS90C124 Datasheet, PDF (10/17 Pages) National Semiconductor (TI) – 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer

AC Timing Diagrams and Test Circuits (Continued)
FIGURE 11. Deserializer Setup and Hold Times
20171912
Note: C_L includes instrumentation and fixture capacitance within 6 cm of ROUT[23:0]
20171913
FIGURE 12. Deserializer TRI-STATE Test Circuit and Timing
www.national.com
10