DS08MB200 Datasheet, PDF (3/8 Pages) National Semiconductor (TI) – Dual 800 Mbps 1:2/2:1 LVDS Mux/Buffer

Connection Diagrams
Top View
DAP = GND
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TRI-STATE and Powerdown Modes
The DS08MB200 has output enable control on each of the
six onboard LVDS output drivers. This control allows each
output individually to be placed in a low power TRI-STATE
mode while the device remains active, and is useful to
reduce power consumption on unused channels. In TRI-
STATE mode, some outputs may remain active while some
are in TRI-STATE.
When all six of the output enables (all drivers on both chan-
nels) are deasserted (LOW), then the device enters a Pow-
erdown mode that consumes only 0.5mA (typical) of supply
current. In this mode, the entire device is essentially pow-
ered off, including all receiver inputs, output drivers and
internal bandgap reference generators. When returning to
active mode from Powerdown mode, there is a delay until
valid data is presented at the outputs because of the ramp to
power up the internal bandgap reference generators.
Any single output enable that remains active will hold the
device in active mode even if the other five outputs are in
TRI-STATE.
When in Powerdown mode, any output enable that becomes
active will wake up the device back into active mode, even if
the other five outputs are in TRI-STATE.
Input Failsafe Biasing
External pull up and pull down resistors may be used to
provide enough of an offset to enable an input failsafe under
open-circuit conditions. This configuration ties the positive
LVDS input pin to VDD thru a pull up resistor and the
negative LVDS input pin is tied to GND by a pull down
resistor. The pull up and pull down resistors should be in the
5kΩ to 15kΩ range to minimize loading and waveform dis-
tortion to the driver. Please refer to application note AN-
1194, “Failsafe Biasing of LVDS Interfaces” for more infor-
mation.
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Directional Signal Paths Top View
(Refer to pin names for signal polarity)
Output Characteristics
The output characteristics of the DS08MB200 have been
optimized for point-to-point backplane and cable applica-
tions, and are not intended for multipoint or multidrop signal-
ing.
Multiplexer Truth Table (Note 4)
Data Inputs
Control Inputs
SIA_0 SIB_0 MUX_S0 ENL_0
X
valid
0
1
valid
X
1
1
X
X
X
0 (Note 5)
X = Don’t Care
Z = High Impedance (TRI-STATE)
Output
LO_0
SIB_0
SIA_0
Z
Repeater/Buffer Truth Table (Note 4)
Data
Input
Control Inputs
Outputs
LI_0
ENA_0 ENB_0 SOA_0 SOB_0
X
0
0
Z (Note 5) Z (Note 5)
valid
0
1
Z
LI_0
valid
1
0
LI_0
Z
valid
1
1
LI_0
LI_0
X = Don’t Care
Z = High Impedance (TRI-STATE)
Note 4: Same functionality for channel 1
Note 5: When all enable inputs from both channels are Low, the device
enters a powerdown mode. Refer to the applications section titled TRI-STATE
and Powerdown modes.
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