PC87108AVHG Datasheet, PDF (26/56 Pages) National Semiconductor (TI) – Advanced UART and Infrared Controller

3.0 Architectural Description (Continued)
3.2.2 LCR/BSR – Link Control/Bank Select Registers
These registers are the same as in bank 0.
3.3 BANK 2
Address
Offset
0
1
2
3
4
5
6
7
TABLE 7. Bank 2 Register Set
Register
Name
BGD(L)
BGD(H)
EXCR1
LCR/BSR
EXCR2
Reserved
TXFLV
RXFLV
Description
Baud Generator Divisor Port (Low-Byte)
Baud Generator Divisor Port (High-Byte)
Extended Control Register 1
Link Control/Bank Select Registers
Extended Control Register 2
TX__FIFO Level
RX__FIFO Level
3.3.1 BGD – Baud Generator Divisor Port
This port provides the data path to the baud generator divisor register that holds the reload value for the baud generator counter.
Divisor values from 1 to 2¹⁶ − 1 can be used. See Table 8. The zero value is reserved and must not be used. The programmed
value must be such that the baud generator output clock frequency is sixteen times the desired baud rate value. The baud gen-
erator divisor register is 16 bits wide and is split into two independently accessible 8-bit parts. Correspondingly, the BGD port is
also 16 bits wide and is split into two 8-bit parts, occupying consecutive address locations. BGD(L) is located at the lower address
and accesses the least significant part of the baud generator divisor register, whereas BGD(H) is located at the higher address
and accesses the most significant part. The baud generator divisor register must be loaded during initialization to ensure proper
operation of the baud generator. Upon loading either part of it, the baud generator counter is immediately loaded.
After reset, the content of the baud generator divisor register is indeterminate.
Prescaler
Value
Baud Rate
50
75
110
134.5
150
300
600
1200
1800
2000
2400
3600
4800
7200
9600
14400
19200
28800
31250
38400
TABLE 8. Baud Generator Divisor Settings
13
1.625
1
Divisor
2304
1536
1047
857
768
384
192
96
64
58
48
32
24
16
12
8
6
4
—
3
% Error
0.16%
0.16%
0.19%
0.10%
0.16%
0.16%
0.16%
0.16%
0.16%
0.53%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
—
0.16%
Divisor
18461
12307
8391
6863
6153
3076
1538
769
512
461
384
256
192
128
96
64
48
32
—
24
% Error
0.00%
0.01%
0.01%
0.00%
0.01%
0.03%
0.03%
0.03%
0.16%
0.12%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
—
0.16%
Divisor
30000
20000
13636
11150
10000
5000
2500
1250
833
750
625
416
312
208
156
104
78
52
48
39
% Error
0.00%
0.00%
0.00%
0.02%
0.00%
0.00%
0.00%
0.00%
0.04%
0.00%
0.00%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.16%
0.00
0.16%
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