DP83932C-20 Datasheet, PDF (24/98 Pages) National Semiconductor (TI) – MHz SONICTM Systems-Oriented Network Interface Controller

4 0 SONIC Registers (Continued)
RA^k5 0^l
0h Command Register
15
0
Status and C Control Fields
1 Data Configuration Register
Control Fields
Status and
Control Registers
2 Receive Control Register
3 Transmit Control Register
Status and Control Fields
Status and Control Fields
4 Interrupt Mask Register
Mask Fields
$ 5 Interrupt Status Register
3F Data Configuration Register 2
Status Fields
Control Fields
Transmit
Registers
6 Upper Transmit Descriptor Address Register Upper 16-bit Address Base
7 Current Transmit Descriptor Address Register Lower 16-bit Address Offset
0D Upper Receive Descriptor Address Register Upper 16-bit Address Base
0E Current Receive Descriptor Address Register Lower 16-bit Address Offset
14 Upper Receive Resource Address Register Upper 16-bit Address Base
Receive
Registers
15 Resource Start Address Register
16 Resource End Address Register
Lower 16-bit Address Offset
Lower 16-bit Address Offset
17 Resource Read Register
Lower 16-Bit Address Offset
$ 18 Resource Write Register
2B Receive Sequence Counter
21 CAM Entry Pointer
Lower 16-bit Address Offset
Count Value
87
Count Value
4
Pointer
22 CAM Address Port 2
Most Significant 16 bits of CAM Entry
23 CAM Address Port 1
Middle 16 bits of CAM Entry
CAM
Registers
24 CAM Address Port 0
25 CAM Enable Register
Least Significant 16 bits of CAM Entry
Mask Fields
26 CAM Descriptor Pointer
$ 27 CAM Descriptor Count
Lower 16-bit Address Offset
5
Count Value
Tally
Counters
2C CRC Error Tally Counter
2D Frame Alignment Error Tally
) _{2E Missed Packet Tally}
Count Value
Count Value
Count Value
Watchdog
Timer
29 Watchdog Timer 0
2A Watchdog Timer 1
Lower 16-bit Count Value
Upper 16-bit Count Value
28 Silicon Revision Register
Chip Revision Number
FIGURE 4-3 Register Programming Model
24