DS90LV804_07 Datasheet, PDF (2/10 Pages) National Semiconductor (TI) – 4-Channel 800 Mbps LVDS Buffer/Repeater

Block and Connection Diagrams
20156701
DS90LV804 Block Diagram
Pin Descriptions
20156702
DS90LV804 LLP Pinout
(Top View)
Pin
LLP Pin
Name
Number
DIFFERENTIAL INPUTS
IN0+
9
IN0−
10
IN1+
11
IN1−
12
IN2+
13
IN2−
14
IN3+
15
IN3−
16
DIFFERENTIAL OUTPUTS
OUT0+
32
OUT0−
31
OUT1+
30
OUT1−
29
OUT2+
28
OUT2−
27
OUT3+
26
OUT3-
25
DIGITAL CONTROL INTERFACE
EN
8
POWER
V_DD
GND
3, 4, 6, 7, 19, 20, 21, 22
1, 2, 5, 17, 18
(Note 1)
N/C
23, 24
I/O, Type
Description
I, LVDS Channel 0 inverting and non-inverting differential inputs.
I, LVDS Channel 1 inverting and non-inverting differential inputs.
I, LVDS Channel 2 inverting and non-inverting differential inputs.
I, LVDS Channel 3 inverting and non-inverting differential inputs.
O, LVDS Channel 0 inverting and non-inverting differential outputs. (Note 2)
O, LVDS Channel 1 inverting and non-inverting differential outputs. (Note 2)
O, LVDS Channel 2 inverting and non-inverting differential outputs. (Note 2)
O, LVDS Channel 3 inverting and non-inverting differential outputs. (Note 2)
I, LVTTL Enable pin. When EN is LOW, the driver is disabled and the LVDS outputs are in TRI-
STATE. When EN is HIGH, the driver is enabled. LVCMOS/LVTTL level input.
I, Power V_DD = 3.3V, ±5%
I, Power Ground reference for LVDS and CMOS circuitry. For the LLP package, the DAP is
used as the primary GND connection to the device. The DAP is the exposed metal
contact at the bottom of the LLP-32 package. It should be connected to the ground
plane with at least 4 vias for optimal AC and thermal performance. The pin numbers
listed should also be tied to ground for proper biasing.
No Connect
Note 1: Note that for the LLP package the GND is connected thru the DAP on the back side of the LLP package in addition to grounding actual pins on the
package as listed.
Note 2: The LVDS outputs do not support a multidrop (BLVDS) environment. The LVDS output characteristics of the DS90LV804 device have been optimized
for point-to-point backplane and cable applications.
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