CD4031BM Datasheet, PDF (2/6 Pages) National Semiconductor (TI) – 64-Stage Static Shift Register

Absolute Maximum Ratings (Notes 1 and 2)
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Supply Voltage (V_DD)
Input Voltage (V_IN)
Storage Temperature Range (T_S)
Power Dissipation (P_D)
Dual-In-Line
Small Outline
b0 5V to a18V
b0 5V to V_DD a0 5V
b65 C to a150 C
700 mW
500 mW
Lead Temp (T_L) (Soldering 10 sec )
260 C
Recommended Operating
Conditions (Note 2)
Supply Voltage (V_DD)
3V to 15V
Input Voltage (V_IN)
0V to V_DD
Operating Temperature Range (T_A)
CD4031BM
CD4031BC
b55 C to a125 C
b40 C to a85 C
DC Electrical Characteristics (Note 2) CD4031BM
Symbol Parameter
Conditions
b55 C
a25 C
a125 C
Units
Min Max Min Typ Max Min Max
I_DD
Quiescent Device V_DD e 5V V_IN e V_DD or V_SS
Current
V_DD e 10V V_IN e V_DD or V_SS
V_DD e 15V V_IN e V_DD or V_SS
5
0 01 5
150 mA
10
0 01 10
300 mA
20
0 02 20
600 mA
V_OL
Low Level Output
Voltage
( ^{l l VDD e 5V}
V_DD e 10V
V_DD e 15V
V_IH e V_DD V_IL e 0V I_O ^k 1 mA
0 05
0 05
0 05
0 0 05
0 0 05
0 0 05
0 05 V
0 05 V
0 05 V
V_OH
High Level Output
Voltage
( ^{l l VDD e 5V}
V_DD e 10V
V_DD e 15V
4 95
V_IH e V_DD V_IL e 0V I_O ^k 1 mA 9 95
14 95
4 95 5
9 95 10
14 95 15
4 95
V
9 95
V
14 95
V
V_IL
Low Level Input
Voltage
( ^{l l VDD e 5V VO e 0 5V or 4 5V}
V_DD e 10V V_O e 1 0V or 9 0V
V_DD e 15V V_O e 1 5V or 13 5V
I_O ^k 1 mA
15
30
40
2 25 1 5
45 30
6 75 4 0
15 V
30 V
40 V
V_IH
High Level Input
Voltage
( ^{l l VDD e 5V VO e 0 5V or 4 5V}
V_DD e 10V V_O e 1 0V or 9 0V
V_DD e 15V V_O e 1 5V or 13 5V
I_O ^k 1 mA
35
70
11 0
3 5 2 75
70 55
11 0 8 25
35
70
11 0
V
V
V
I_OL
Low Level Output
Current Q Output
(Note 3)
( ^{VDD e 5V VO e 0 4V}
V_DD e 10V V_O e 0 5V
V_DD e 15V V_O e 1 5V
V_IH e V_DD
V_IL e 0V
23
19 38
51
42 84
10 5
8 8 17
13
mA
28
mA
61
mA
I_OL
( ^{Low Level Output VDD e 5V VO e 0 4V}
Current Q and CL_D V_DD e 10V V_O e 0 5V
Outputs (Note 3) V_D e 15V V_O e 1 5V
V_IH e V_DD
V_IL e 0V
0 64
0 51 0 88
16
1 3 2 25
42
34 88
0 36
mA
09
mA
24
mA
I_OH
( ^{High Level Output VDD e 5V VO e 4 6V}
Current All Outputs V_DD e 10V V_O e 9 5V
(Note 3)
V_DD e 15V V_O e 13 5V
V_IH e V_DD
V_IL e 0V
b0 64
b0 51 b0 88
b0 36
mA
b1 6
b1 3 b2 25
b0 9
mA
b4 2
b3 4 b8 8
b2 4
mA
I_IN
Input Current
V_DD e 15V V_IN e 0V
V_DD e 15V V_IN e 15V
b0 1
01
b10^b5 b0 1
10^b5 0 1
b1 0 mA
1 0 mA
Truth Tables
Mode Control (Data Selection)
Each Stage
Mode
Control
0
0
1
Data
In
0
1
X
Recirculate
In
X
X
0
Data Into
First Stage
0
1
0
D_n
CL
Q_n
0
L
0
1
L
1
X
K
NC
1
X
1
1
X e irrelevant NC e no change L e Low to High level transition K e High to Low level transition
2